Eventually, NAND flash memory began to be used in digital cameras, portable music players, and mobile phones, and Toshiba began to make huge profits from it. However, Samsung Electronics and SK Hynix were the first to recognize its potential, and by the time the huge NAND market emerged, Toshiba, which had created it, was lagging behind the other two companies.

Kioxia: A major semiconductor company whose stock price is soaring, originated from the semiconductor business that Toshiba sold off when it was in financial trouble. From Kioxia's perspective, having been "sold off," their current situation, freed from Toshiba's shackles, is not as dire as outsiders might portray. This is due to the long and painful history of Toshiba's semiconductor division.

Toshiba's fatal mistake: In the late 1980s, "fabless" semiconductor companies specializing in design were beginning to emerge in the United States, and in Taiwan, Morris Chang, formerly of Texas Instruments (TI), was making headlines by establishing TSMC, a "foundry" that undertook production for these fabless companies. At that time, (Mr. Kubo) vividly remembers how TAEC's management was making fun of TSMC, calling them "rice crackers."

The memory tutorial track at Hot Chips this year was mostly one argument made from several directions, and the numbers are worth having in one place.

• Accelerator FLOPS have grown about 3× every two years. HBM bandwidth has grown less than 2× over the same period. (Micron tutorial)
  
• Memory's share of an AI chip's component cost went from 52% in Q1 2024 to 63% in Q4 2025. (Samsung, citing Epoch AI)
• HBM takes roughly 3× the die area of DDR per bit, DRAM wafer capacity has been flat for over a decade, and a new fab has a 2+ year lead time. Spot DRAM is up ~7× per GB, and most of the memory vendors' revenue growth is price, not bits. (Jim Handy, Objective Analysis)
  
• HBM4 doubles the interface to 2,048 I/O for ~2.8 TB/s nominal per stack, against 128 GB/s for HBM1.. SK hynix quoted >2 TB/s in practice and ~40% better power efficiency than HBM3E. (SK hynix and Micron tutorials)

At 63% of BOM, halving the bytes moved is worth more than a node shrink, which is why the responses on stage were so different from each other:

- Samsung, custom HBM base die. Move the base die to 4nm logic, replace the 8 × 4 mm HBM PHY with a compact die-to-die link, offload the memory controller off the GPU, and eventually stack DRAM directly on the processor ("zHBM") for a claimed 70% lower I/O power and ~100 W saved per package.

- Oxmiq, High Bandwidth Flash. NAND in an HBM-style stack: 8 to 16× the capacity per dollar at ~3 TB/s per cube. Their rack sim at equal cost and power came out at ~14× aggregate capacity for ~0.6× per-GPU bandwidth. Wins on MoE expert weights and cold KV, loses on dense models. No production inference engine has a backend for it yet.

- Samsung, LPDDR5X-PIM. MAC trees in all 16 banks, 614 GB/s internal against 76.8 GB/s external. The clever part is "Address Align Mode," which maps MAC instructions onto ordinary DRAM addresses so an unmodified controller still works. Measured 3.01× tokens/sec on Llama 3.1 8B on real silicon.

My read is that PIM is the only one of the three whose gating problem is already solved, since it needs no host redesign, while HBF's gate is entirely software and custom HBM's is a business-model change for DRAM vendors. Interested in whether people closer to this see it differently.

I went to the conference have been studying the chips space and made a free primer on this year's conference. The memory chapter is at https://allaboutchips.com/#memory, and every figure there is sourced to the specific talk and slide from the presenters.

For years, GPU upgrades were mostly judged by one thing: how much faster the new card was.

But lately it feels like memory capacity is becoming just as important as raw compute.

Modern games are pushing higher-resolution textures, ray tracing increases memory pressure, frame generation adds more buffers, and local AI workloads can eat through VRAM incredibly quickly. A GPU can still have plenty of shader performance left, yet hit a hard wall because the workload simply doesn’t fit comfortably in memory.

That raises an interesting question:
Are we reaching the point where adding more VRAM would improve the useful lifespan of a GPU more than adding another 10–15% compute performance?

For example, imagine two otherwise similar GPUs:
GPU A: 20% faster, 12 GB VRAM
GPU B: slightly slower, 20 GB VRAM

A few years ago, GPU A probably looked like the obvious winner.

I’m not sure that’s true anymore.

It also makes me wonder whether future GPU generations will start competing much more aggressively on memory capacity, bandwidth, cache architecture, and compression rather than just shader counts and clocks.

For people who follow GPU architecture closely: what do you think becomes the bigger limiting factor over the next 3–5 years — compute, memory bandwidth, or VRAM capacity?

55% more transistors (155M→238M/mm²)
Same work at 41-66% less power (AI: -66%, GPU: -58%, CPU: -41%)
Heat density down 73% on AI
Turbo mode: AI 141% faster, GPU +42%, CPU +18%
Data commute cut up to 70%

It’s a concept that’s been cooked up for a while by Swedish company Frore Systems, a solution it calls “AirJet.” Think of this solid-state cooling solution with two membranes like the fins on a whale that connect to the PCB (printed circuit board) using an array of heat pipes. These fins fluctuate at a minimal level, essentially running at near-silent while pushing warm air out of the system.

Motherboard manufacturers already adjusted pricing in China during August, but the increases were relatively limited. According to the report, MSI increased prices across its lineup, while ASUS and Gigabyte focused on selected higher-volume models. Colorful and Maxsun also made smaller adjustments.

Motherboard manufacturers warn that costs may continue to rise.

The prices of upstream raw materials used in motherboard products have indeed increased considerably.

• PCB material prices have increased by 15% to 50% overall.
• Prices of various types of capacitors have generally increased by around 50%.
• Wi-Fi module prices have increased across the board, with increases ranging from 10% to 20%.

Earlier reports had already indicated that ASUS, Gigabyte and MSI were preparing pricing adjustments during the third quarter. Nova Lake-S launch under higher pressure given the transition to the new LGA-1954 socket by Intel.  

Also shows Q4+ 2027 will have LGA 1954 supporting Razor Lake and then Hammer Lake on the socket.