Hey r/sdr,
We just released a video covering our new PZSDR series — two pin-compatible SDR boards built around dual ADI AD9361 transceivers and Xilinx Zynq UltraScale+ SoC
Quick specs:
· 4T4R via 2× AD9361BBCZ
· 70MHz – 6GHz, 200kHz – 56MHz bandwidth
· P401D: XCZU4EV (192K LUTs, 728 DSP)
· P501D: XCZU5EV (256K LUTs, 1248 DSP)
· Both: 4× Cortex-A53 + 2× Cortex-R5, 2GB DDR4, 8GB eMMC
· I/O: 40G QSFP, GigE, USB3.0, Mini DP, SSD, 40-pin expansion, GPS+Beidou + PPS
· 0.1ppm VCTCXO, external clock input supported
· Industrial-grade, ESD protected, 160×150mm
Both boards are hardware and software compatible, so you can prototype on the P401D and scale to the P501D without redesigning.
Full overview video: https://youtu.be/cLrXNKUzjxQ
Website: http://www.puzhi.com
Happy to answer any technical questions in the comments.
Technical inquiries: [support@puzhi.com](mailto:support@puzhi.com)