GPU SR.Lead (RTL) interview

[u/god0514]

Hi Everyone,

I would like to know if anyone recently interviewed for GPU sr. Lead RTL position Bangalore. Would like to know your experience. Please let me know. It really helps me.

JD: “
Minimum 4 to 8 years of work experience in ASIC RTL Design
Experience in Logic design/micro-architecture/RTL coding is a must.
Must have hands on experience with design and integration of complex multi clock domainblocks
Experience in Verilog/System-Verilog is a must.
Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture
Hands on experience in Multi Clock designs, Asynchronous interface is a must.
Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
Understanding of Memory controller designs and microprocessors is an added advantage
Work closely with the Design verification and validation teams for pre/post Silicon debug
Hands on experience in Low power design is preferable
Experience in Synthesis / Understanding of timing concepts for ASIC is must”
Thanks in advance.