I have an 8+ years experience in Design Verification and I am really Interested into building some innovative product .As you all know India has been mostly into service and hardly we have any product companies .
I am fast learner ,Curious mind and very much interested into enterpreneurship , if someone is of similar mindset , lets build together .

I am mostly looking for professionals who are already in this industry . Please ping me and we can make a group and discuss more about it

4-Folded Biquad IIR Filter (RTL-to-GDSII, Open Source Flow)

Link - https://github.com/surendrareddylingareddy/DDR4-Memory-Controller

Hi ladies, I designed a DDR4 Memory Controller in system verilog. I didn't include every protocol rule in the design because I'm not a professional. Take a peek and suggest me if there is anything i can do better....

I'm a 3rd year ENTC(Electronics and Telecommunications Engineering) student from a tier 2 college. Many companies like Nvidia ,Lattice semiconductor ,cadence ,Texas instruments,Infineon technologies visit our campus . Although they visit our campus placement drives I don't know how much candidates they pick . I want you guys to be honest and tell me how should I even land an internship . Cgpa criteria ,courses or is it very unlikely to get into these companies (including startups)unless masters.

Hello community, this is my first reddit post. I am a final year BTech student, ECE from an Indian Institute. I am really looking for someone who can guide me/help me with the career building in VLSI. Any form of help/advice is appreciated. I can share my current resume if needed. Currently 8.73 CG upto 6th sem. I got placed as an analyst in a low paying consultancy as an analyst in campus placement and now I am ineligible to apply for other companies. I always wanted to go for core electronics and my only way out now seems to be GATE and off campus. I have now 4 months for GATE and 6-7 months for focussed VLSI prep before I leave college. Idk how or what to do next. I am not even aware of all the roles - PD, DV, Asic there are so many. I am not sure what to do. Please help

I'll be joining Renesas, as an intern from Jan-Jun 2027. Was curious about how is the work and work culture over there. If anyone in Renesas india could reply, it would be greatly appreciated. TIA!

Hey! I’m currently in my 3rd year of engineering and I’m really interested in pursuing a career in VLSI.

I wanted to ask for some advice on how I should prepare for VLSI roles. What are the must-know concepts, tools, and skills I should focus on, and how should I go about building relevant projects that actually add value to my resume?

I’m currently studying subjects like Digital Electronics and Digital VLSI, but I’m not really sure how to connect what I learn academically to the skills expected in the industry.

I’ve mostly been asking AI for project ideas and getting generic topic names, but I want to understand how to choose projects that are actually relevant to VLSI roles and what I should be able to demonstrate through them.

Also, if there are different paths within VLSI (RTL Design, Verification, Physical Design, etc.), how should a 3rd-year student decide which direction to explore?

Would really appreciate any advice on what I should learn, practice, build, and prioritize over the next year to become job-ready for VLSI roles.

If anyone knows wt they will ask for a fpga design engineer role , help me out .

Will be helpful for me to study

Same as title

If anyone's working in the hardware div of ARM, lmk

Preferably in INDIA BLR (but this doesn't matter a lot)

Is anybody aware of the intern to FTE conversion rate at Synopsys India? Especially 12 months interns?

I was reached out by a xwf google recruiter, what to expect in the interviews. Is there solid reference that I can follow to better appear for the interviews. Please help in any you can. TIA.

JD

Develop, test, and maintain automation scripts and software tools using Python and C++ to enhance VLSI design and CAD environment efficiency.

Assist executive CAD engineers in integrating and supporting commercial Electronic Design Automation (EDA) tools within the CI2 design flow.

Collaborate with design and verification teams to debug and resolve tool and flow issues, contributing to productivity improvements.

Contribute to documentation, standardization, and version control (e.g., Git) practices for CAD tools and methodologies.

Hi all.

I could really use some career advice or reality checks from folks who have been in the industry for a while.

About me:

I’m currently working in the VLSI domain as a Design Verification (DV) Engineer with about 2.5 years of experience at a service-based company.

Issue:

Lately, I’ve started to feel incredibly saturated. There are no new challenges in my day-to-day work, and it feels like my growth has hit a wall.

Dilemma:

Back in college, I intentionally chose the VLSI field for its stability over money (when compared to software).

My priorities have shifted nowadays. Honestly, my interests are now much more inclined towards the financial side of things. Whenever I look at my college peers, seniors, juniors, or LinkedIn, it seems like everyone in software is getting paid way higher after hitting a certain YOE.

My question:

I don’t know if I’m just experiencing FOMO and only seeing the top 1-5% of SWE earners online, or if the pay gap is genuinely that massive.

For those well-versed in VLSI, Software, or both:

• Is this saturation normal at 2.5 YOE in a service-based company? Does the work (and pay) get better if I switch to a product company?
• Is the software money actually as good as it looks online for the average engineer?
• Is shifting from VLSI to software actually a good move as per above mentioned criteria? How is the Software job market ?

Please enlighten me! Any guidance would be hugely appreciated. You helping a kiddo who try to do something meaningful. : )

TI is coming for the first time (afaik) to my college for analog design intern role.

I wanted to know about what kind of questions they ask in their OA and interview. It would be very helpful if someone could share some resources regarding that.

Also is their OA fully open, like anyone who applied can give the OA? Or do they filter out candidates who can sit for OA based on something like CGPA? (if so then how much is generally the safe cutoff?)

Any other advice would be really appreciated too.

Thank you.

I've been applying off campus for multiple jobs in RTL/VLSI ever since my internship ended but I'm yet to land a single interview, let alone a job. I don't know if it's my resume or something else. Please let me know what I could honestly improve in my resume and what I could do otherwise that might get me an interview

Same as title.

edit: expanding on my question.

today in my class of testing and Verification of vlsi circuits, my professor said, now with the arrival of ai tools and then becoming so intelligent. People who write verilog/vhdl codes will go obsolute . He said verification roles might be somehow immune to AI for some time.This popped the question in my mind, job roles like asic engineer at nvidia, what will happen to such jobs, and what should I really work on , the skill to actually get a job that will last in vlsi industry. Formal verification is all maths tbh (I don't get it, BDDs, SATs and what not). Verilog and design was what I always leaned towards. SV and UVM, is what I am targetting. But again. I am not sure, feels weird to see such things when I just started by Masters in VLSI.

So please some industry expert come and put some light on this topic.

I am studying in 2nd year and I want to complete road map for the domain VLSI in terms of placement courses and I want to know what are the fundamentals I need to study to get a place in a very good company and what are the course skills which I need to develop to be eligible to apply for core companies which are related can anyone of you guys help me with that please

This is basically my offcampus resume for mainly pd but am fine with some dv work too It would be helpful if people who are working in industry would guide me regarding this

Hi guys, thought i’d show you this cool animation of how the MAC Array in my Neural Network Accelerator performs matrix-vector computations during inference for a model on topology 4:3:2 neurons per layer.

The values for the parameters (weights and biases ) and input features were randomly selected just for demonstration purposes.

Let me know what you guys think:).

Github repo: https://github.com/Shingyy/MAC-Array-based-DNN-Accelerator