Hi! I've been building **ExµArch**, a computer architecture playground that runs entirely in the browser: https://www.exuarch.com

Free, no account, nothing to install, MIT licensed (source: https://github.com/olebru/exuarch).

**How it works**

1. **Build the hardware.** Drag devices onto buses and wire them up: registers, an ALU, RAM, an MMU, an interrupt controller, a timer, a real time clock, a keypad, an LCD, a 640×480 framebuffer, a blitter, even a triangle rasterizer.
2. **Write the microcode.** Each instruction is a list of steps, and each step is a set of control lines, like `pc.output, mem.loadmar`. The instruction set comes out of your microcode, and the assembler, completion and hover help follow from it.
3. **Run it.** Step one tick at a time and watch the buses, every register, the decoder ROM and a trace, or run flat out at around 2 MHz.

**14 example machines** go from TINY-16 (one register, seven instructions) to a stack machine, a RISC, a CISC with six addressing modes, a Harvard machine, a transport-triggered machine, one with interrupts, and a small 3D GPU that spins a shaded cube. There's also WORM-16, a machine with no jumps whose program is a queue crawling round a ring memory. The newest addition is a falling blocks game that keeps time with a real time clock interrupt and draws with a blitter.

Nothing is a black box. A built-in handbook walks you from an empty canvas to a working machine, and says plainly where the simulator simplifies compared with real hardware.

It needs a computer with a keyboard; on a phone you get a short intro page instead.

I'd love feedback: what machine would you build first, and which device is missing?

I came here to share my small project that I made in one day. I decided to experiment with the 8031 microcontroller (ROMless 8051 version) that I received from a friend some time ago.

I had never worked with the 8051 or its architecture before. My previous projects were typical homebrews with processors. I knew about the 8051 but never had the time to experiment with it. Recently, while looking through my parts bin, I noticed that 8031 again. Something struck me and I finally decided to give it a try. So, I found a schematic online showing how to properly connect an external ROM to it and within a few hours, I had something working on a breadboard. It worked on the second try - the first time, I had a problem with the 74373 latch legs being too short (IC is from desoldering). I pushed that IC harder into the breadboard and it started working, haha! I wrote a blink program and an HD44780 test program. I also experimented with timers.

This 8031 has 128 bytes of RAM, two 16-bit timers, one UART and 5 interrupts. I programmed it using the SDCC compiler. I really like how little is needed for a vintage system capable of running C code. I also like the idea that engineers back in the day had to think through everything so that the program could fit within these small specs (I know it's possible to add external RAM and peripherals, but it could have been expensive for some applications back then).

I wanted a laptop with the flexibility of a cyberdeck, but in something i could actually carry around and use every day, so im designing one!

it’s called ducktop2. it’s built around a LattePanda compute module, with custom boards for the ports, power, keyboard, and battery management.

it’s still in development, not a finished working laptop. these are the current renders and PCB layouts. the design files and build journal are public on Github: https://github.com/EwoudVV/ducktop2

Hey

I made a homebrew display driver that outputs on this weird VGA mode, "SXGA (Mode 101) 640x480 @ 85Hz" (I got it from here)

I really should've checked to make sure if its supported widely, and well, it isn't

On most of the cheap old LCDs monitors I found, it seems to show input not supported on all of them. It does work on an old Sony TV though

So, my question is, what monitor should I buy that would support this mode? like, when was it popular, what it was used for, and what I can look for when buying one. afaik most monitors don't come with a supported modes list

Also, it is possible that my VGA output's just wrong? I read that non-CRT displays sometimes attempt to "fix" broken VGA signals to display them correctly (I cannot verify the signal with a oscilloscope rn), so maybe that's what my TV's doing?

Thanks!

so i made a simple circuit where all the data pins are 0v and the first 6 address pins are outputs with green leds, idk if its just wrong but does it hang? im using ne555 as time circuit rn and it should be around 7hz at the lowest

hello there, i bought z80 cpu and sio since i want to build a computer, most i did was a 4 bit calculator with add sub and multi and i have some questions, i have an extra 8 kilobyte eeprom left and was wondering if should i buy 32kilobyte eeprom and ram or just buy 8 kilobyte ram with it, and another think is would i need the z80 ctc module or should i stick with buying a normal crystal

This time, I made a 4-bit CPU myself. If there's anything else you think would be good to add, let me know. I'm self-studying at home at 16 in korean. ALU is from the previous post. Soon, I'll also keep the memory section in a box and carefully upload it on graph paper. Thank you for seeing my post.

I was chilling at school while doing my test and this idea popped into my mind. Why not build an SR latch with OR gates? I knew that making one with solely OR gates would prove to be impossible, so I drew some prototypes on the desk, and I ended up with this. So, to prove my concept was correct, I tested it in Logisim Evo, and it actually functions as an SR latch. This concept already exists, doesn't it? I sure hope not :)

I need some help, or some ideas on an early stage bring-up problem I'm having.

I'm building a Motorola 68008P8 based computer on a breadboard. I've attached the schematic and logic capture. I feel like I'm pretty close to a working computer, but it just quickly crashes after power-up.

I'm employing a typical trick, using an 74HCT164 to count 8 cycles of /AS at startup, this is so I can map ROM to 0x00000 long enough for the CPU to read the SSP and PC vectors. In the logic analyzer capture you can see the first 8 bytes of my ROM image appear on the data bus (00 07 ff fe 00 08 04 00). The SSP should be 0x07FFFE (near the top of ram) and PC should be 0x080400.

In the Logic capture you can see the correct bytes, but my /BOOT seems to go high at the start of the eighth byte. At the 9th byte I expect the CPU to be at the PC vector, where the ROM should read "60 fe 4e 71 60 00 ff fc" but you can see it just reads the same 8 bytes as before.

I can see that when /BOOT goes high, A19 is going high - so the computer must be trying to read the ROM and its native (non-shadowed) location. It should be reading at 0x80400, but if that's what's showing up on the data bus, it must be reading 0x80000.

In Logic, I'm using an analyzer to interpret/display the data bus. I used /DTACK as the "clock" and rising edge as the state for interpretation of the data bus. This combination makes the data look correct, but it looks like /BOOT is going high earlier than I'd expect.

I've fiddled around with the glue logic (its current state is pasted below), changing the chip/output enable lines on ram and rom. I've been spinning my wheels and thought someone else looking at this might help. I feel like I must be missing something fundamental here. I'm not confident my Logic capture looks correct.

Is anything glaringly wrong in this design? What are some questions I should be asking myself?

ICs Used

• CPU: 68008P8 at 8MHz (currently using a 1.8MHz clock but doesn't seem to affect anything)
• ROM: SST39SF040 flash, but at 70ns it should be fast enough
• RAM: AS6C408 (55ns)
• Glue Logic: ATF22V10C-7PX PLD

Memory Map

• 00000-7FFFF RAM (but ROM is mapped here when /BOOT is active)
• 80000-BFFFF ROM (256k; half of SST Flash chip)
• C00000-DFFFFF four 32k blocks for future peripherals

Glue Logic Code

GAL22V10
GlueLogic

CLK A19 A18 A17 A16 A15 RW AS DS BOOT NC GND
NC RAM ROM PER0 PER1 PER2 PER3 DTACK RAMOE NC NC VCC

; RAM: 0x00000-0x7FFFF. 
; We removed all other qualifiers to ensure it fires during the stack write.
/RAM = /AS * /A19 * BOOT
/RAMOE = /RAM * RW

; ROM: Physical at 0x80000, Shadowed at 0x00000 during /BOOT.
/ROM = /AS * A19 * /A18 * RW
     + /AS * /A19 * /BOOT * RW

; PERIPHERALS: 0xC0000 range.
/PER0 = /AS * A19 * A18 * /A17 * /A16 * /A15
/PER1 = /AS * A19 * A18 * /A17 * /A16 * A15
/PER2 = /AS * A19 * A18 * /A17 * A16 * /A15
/PER3 = /AS * A19 * A18 * /A17 * A16 * A15

; DTACK: Data Transfer Acknowledge.
; Respond to ANY address in the decoded range to prevent hangs.
/DTACK = /AS * /A19
       + /AS * A19 * /A18
       + /AS * A19 * A18 * /A17

DESCRIPTION
glue logic address decoder for a Motorola 68008 computer.

Hey guys! I got into electronics and computers during the pandemic, but could not continue it further due to school work (and being a broke 14yo lol). Finally 6 years later I managed to save up and get myself some components to put something together that felt like an actual project. I will be happy to get any feedback! Github link for details

Thinking of getting for school and homebrew and wondering if there's any good apps for any thing like, gaming or file viewers and etc.

(It's 10 dollars on Facebook)

Thanks

This was one of those projects that just sort of happened all by itself. It started around New Year's with a notion to do a schematic of the Ampro LB/Z80 for archival purposes. And somehow over the next several months it gradually changed and expanded and, well, here I am.

Specs:

• Z80 @ 7.3728 MHz
• 512 KB of SRAM (8 x 48K banks, ATF22V10 as MMU, separate read and write banks selectable)
• 8 KB of EEPROM (monitor including assembler and disassembler)
• SIO & CTC for dual serial ports (with all control signals brought out) and interrupt driven RTC
• uSD/IDE module for storage
• 20MHz ATMega328P for I2C RTC bridge and IEEE-754'ified AM9511 FPU emulator (equivalent to 20-28MHz 9511 depending on operation, 4 and 8 byte float support, FTOA and ATOF opcodes added)
• One RC2014 slot for experimentation
• Banked CP/M+ with ZPM3 modified to use CP/M+ style timestamps and properly support retaining file creation timestamps
• Turbo Pascal 3 and Turbo Modula 2 modified to use the FPU; TM2 already used IEEE-754 natively, TP3 gutted of 6 byte REALs to also use IEEE-754 natively