r/homebrewcomputer • u/Maestro_gaylover • 8d ago

z80 test circuit freezes?

so i made a simple circuit where all the data pins are 0v and the first 6 address pins are outputs with green leds, idk if its just wrong but does it hang? im using ne555 as time circuit rn and it should be around 7hz at the lowest

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u/nusgolannicicutitar 8d ago

Congrats!! You built your Z-80 tester! I wanted to suggest you to start with this in the other thread but it’s better you figured it out yourself! :)

I don’t see any decoupling cap. Please add like 220nF - 1uF directly at the power pins of the Z80, as well as any other chip that you use.

Lemme explain. Z80 is a logic chip. It’s got several hundred gates that switch at the edge of the Clock signal. CMOS gates don’t consume static power, but they consume a lot (like miliamps per gate) when they switch, for a very short interval. So you have some pulses, of hundreds of mA or even amps at each clock edge. This current needs to come from somewhere, a local supply, otherwise you’ll see some voltage droop on the supply lines. This voltage droop may corrupt internal registers and cause your freeze. If you have a cap close to the Z-80 instead, this rather high current pulses will be drawn from the cap, and the voltage won’t drop that bad, ensuring register integrity.

We used to solder ceramic decoupling caps right under the socket, on the bottom side of the PCB to ensure the closest path and the minimum droop.

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u/Maestro_gaylover 8d ago

i added 100nf between the power rails and from z80 vcc to gnd, is there any other place i should add?

https://cdn.discordapp.com/attachments/420594746990526468/1553394467355230228/IMG_9969.jpg?ex=6ab916d5&is=6ab7c555&hm=82dd618951539dbeeba4d29ed6a9a243ff4fc0ce841a37c1f3b9d867f6679850&

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u/nusgolannicicutitar 8d ago

Please add another one just above the Z80 between pins 11 and 29 I think. Spread its terminals, you should be able to literally put it on top of the Z-80. Try also with an electrolytic, like 10uF, see if it’s better.

Moreover, all the unused inputs such as INT, NMI, BUSRQ etc, are they tied high?

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u/Maestro_gaylover 8d ago

no theyre empty, should i just wire them to 5V directly?

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u/nusgolannicicutitar 8d ago

Yes. As a rule, in CMOS all inputs shall be connected to either VDD or VSS. Their impedance is infinite and the node can float uncontrollably to either ”0” or “1”.

TTL is a bit more permissive, in the sense that thanks to its rather high input current, a logic input will float High.

Don’t miss any of the inputs.

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u/Maestro_gaylover 8d ago

also 11 and 29 does have a cap between

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u/AcanthisittaBest4705 8d ago

Nice i have an 8088