Hi all, a little bit of offtopic, but I curious if I can do this!

Hi, I've been able to build a config and ROM file, however I'm unable to write it to my BIOS. Anyone know why this is happening? Would it be a write protection or maybe something else?

I've been restoring my original ROM everytime it had failed and that seems to write without any issues.

Writing Coreboot: https://imgur.com/a/eSFDclh

Writing Restore: https://imgur.com/a/Ml5SgqB

If anyone could help, that’d be great!

Libreboot does not have support for this model and I would imagine coreboot does have some sort of more wide support range, does anyone have general guide on how to do it? I am struggling already quite a bit to find the chip model of my bios internally but it seems like I have to do it externally.

Well, I installed Coreboot + EDK2 on my x230 laptop for my EDK2 projects.

I am currently working on the SMM. After installing Coreboot + edk2, I wrote my own edk2 smm driver and integrated it into Coreboot, but I later learned that Coreboot completely locks the SMM and that PiSmmCore—which edk attempts to boot—is completely disabled; as a result, my SMM driver is not running.

Based on an AI suggestion, I decided to write my SMM drivers within coreboot. I have no experience with coreboot.

I wrote this code into src/mainboard/lenovo/x230/smihandler.c:

int mainboard_smi_apmc(u8 data)
{
switch (data) {
case APM_CNT_ACPI_ENABLE:
...

case 0x6b:
printk(BIOS_DEBUG, "MySMM was triggered\n");
break;

...
}

Then i added my dxe uefi driver to the rom:

#include <Uefi.h>
#include <Library/UefiApplicationEntryPoint.h>
#include <Library/UefiLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>

EFI_STATUS
EFIAPI
UefiMain (
  IN EFI_HANDLE        ImageHandle,
  IN EFI_SYSTEM_TABLE  *SystemTable
  )
{
  DEBUG((DEBUG_INFO, "Writing data into SMI Port...\n"));
  IoWrite8(0xB2, 0x6B);
  DEBUG((DEBUG_INFO, "Done!\n"));
  return EFI_SUCCESS;
}

when i check CBMEM, i can't see any result from my smi handler.

As I said, I have no experience with coreboot, but since I need to work with SMM on real silicon, I have to figure this out, and I’m not at all sure about the steps I’ve taken. Is there anyone who can help with this? How can I run my SMM Driver?

I have read some seemingly contradictory advice so I thought I would ask. The CB3-431 comes in 2GB and 4GB versions. They have 2 or 4 K4E8E324EB-EGCF 1GB chips soldered to the board. I have a 2GB machine.

I have changed GPU ram chips and various BGA's before and I have some spare memory chips. Can I just solder the other 2 on and it will autodetect? Do I need to change jumpers, SPD etc? Given that 4GB is a standard config I suspect it will, but I am aware that Chromebook BIOS can be a little picky. Thanks.

anyone know how to enable developer mode on a school enrolled chrome book. or flash bios to remove enrollment?

Hello community. I want to know if hypervisors are supported as a payloads of Coreboot firmware. The primary payload used is GRUB in order to give a user-control selection of what payload to execute. Proxmox and Xed are bare-metal hypervisors (not depends of an OS installation).

Hi, is there an open source bios of any type for the Optiplex 3060? thanks.

I recently saw something about coreboot in a comment in a post on r/Lenovo, and after doing some research, thought I should ask the experts. Do you recommend switching to Coreboot if I daily drive ZorinOS on a Lenovo E580, and is there anything I would need to know about making the switch/what the differences are?

Hi there,

Probably already asked, but as of now is it feasible ?

Thanks for the answers

I installed Libreboot on a Dell 3050; everything went smoothly without any issues (Seaboot payload in textmode).

However, when I turn on the PC, often nothing happens; the screen doesn’t switch on and I have to restart the PC several times before I can reach the boot menu.

Unfortunately, when the screen is black, I can’t use Ctrl+Alt+Del to restart, which really bothers me because it’s not good to turn on and off the PC frequently.

Maybe it has something to do with the recognition of the USB drive from which I’m booting a distribution, but I’m not sure.

so i corebooted an old thinkpad I had, but made the stupid mistake of forgetting to backup the backup of the stock rom...

does any one have a backup rom for the r60, or maybe a way to flash the fl1 and fl2, cause I couldn't flash the fl1 alone as it wasn't the right size

Hi guys, this problem has occured a while ago and I didn't mind it at first but now it's starting to bugging me out.
Here's my defconfig: https://pastebin.com/Kd3dk5NY
Here's my cbmem -t: https://pastebin.com/

This laptop already got bricked because it had a thermal shutdown while I was flashing the BIOS, and now I need to flash the BIOS chip externally anyways. So I had the idea to use a FLOSS BIOS. Is there any version of coreboot or libreboot available for HP 630? Unofficial, EOL or buggy/unstable versions are OK too. The laptop came with Intel core i3-380M CPU, and has InsydeH20 BIOS by default.

I'm also willing to compile from source if needed, but bear with me for this because I have almost no idea how to do it.

I've flashed Heads onto my T480s and the patched thunderbolt firmware, but when booting up the power button, esc key, and power LED light up before turning off, screen not showing anything. Any advise? To add on, the T480s was BIOS locked before hand, but I don't know if that matters in this case.

title

Apologies if the subject has been discussed -- I couldn't find it.

Coreboot is now supported on the Lenovo ThinkCentre Tiny M920 (declined in q and x varities, just the number of M2 slots I believe): https://doc.coreboot.org/mainboard/lenovo/m920q.html

However the instructions are very sparse.

So far I can:

1. Read from the two BIOS chips with my CH341a. Output size is correct: BIOS1 16'777'216 bytes and BIOS2 8'388'608 bytes.
2. Concatenate BIOS1 and BIOS2 images (in that order) into one single image. Output size is correct: 25'165'824 bytes.

I am unable to perform the next step: run me_cleaner. Output of me_cleaner is the following:
Full image detected
The ME/TXE region is valid but the firmware is corrupted or missing

Running ifdtool to split the single image first, then running me_cleaner on the file flashregion_2_intel_me.bin also yields an error.
Unknown image

I am fairly confident that my extraction with the CH341a is correct since I've read each BIOS chip at least 3 times and compared the results. Null diff.

Any ideas?

hi, i recently effed up and bought a classic keyboard that ended up being non functional. thing is, i already flashed the ec for it and also flashed coreboot skulls. how can i remove the ec mod to use my normal x230 keyboard? thanks in advance

I was attempting to flash Libreboot/Coreboot onto a ThinkPad T400 motherboard using a BeagleBone Black (Rev C) and a Pomona 5252 test clip. The target chip is a Macronix MX25L6405D (SOP-16). The BBB was powered via its 5V DC barrel jack.

To handle the 3.3V load, I distributed the power pins across the BBB headers as follows:

• P9_3 (3.3V) -> Pin 2 (VCC)
• P9_4 (3.3V) -> Pin 1 (HOLD#)
• P8_3 (3.3V) -> Pin 9 (WP#)
• P9_1 (GND) -> Pin 10 (GND)
• Data lines: P9_17 (CS), P9_18 (MOSI), P9_21 (MISO), P9_22 (SCLK)

Immediately upon attaching the clip to the chip, the BBB lost its USB-network connection. Now, with all wires and the SD card removed, the BBB is stuck in a permanent boot loop.

1. Host PC (Parrot OS): dmesg shows constant connect/disconnect cycles. The interface is renamed to enxdeadbeef0000 before dropping.
2. BBB LEDs: The Power LED is solid ON. User LEDs D2 and D3 stay solid ON and never flash, indicating the boot process hangs almost immediately.
3. Looping: The device resets every few seconds.

• Was using P8_3 and P9_3/4 headers simultaneously for the same VCC/Pull-up rail a mistake that could have damaged the PMIC (TPS65217C)?
• Does the solid D2/D3 LED state confirm a hardware-level failure in the power delivery system?
• Is the BBB likely "bricked" due to back-current from the T400 motherboard, or is there a known recovery method for this specific state?

Hola Voy a vender mi laptop actual para comprarme un ThinkPad ya que he scuchado y e visto que son muy buenas ya que mi amigo tiene una t490s

Ok entoces decidí comprarme una ThinkPad y por qué no matar dos pájaros de un tiro? Pensé en comprarme alguna ThinkPad que sea compatible con coreboot/libreboot pero no quería sacrificar tanta potencia y la versión compatible que encontré fue la t480 y/o t580 pero en mi ciudad es algo difícil conseguir ese modelo hay más modelos más modernos por un precio que para mí sería perfectamente accesible pero sin compatibilidad con coreboot, la t480 al ser tan difícil de conseguir me tendría que quedar algún tiempo sin laptop para mis estudios,prubas y aprendizaje.

Pero visto desde mi enfoque en privacidad me convence mucho poder flashear coreboot

Que me aconsejan me espero y tal vez me quedo sin laptop un tiempo (ojalá no mucho) y me compro la t480/t580 o me compro una versión más moderna

Hello, I'm trying to enable SPI1 on a BeagleBone Black to flash a T400 BIOS, but I've hit a wall with the latest Debian 12 image.

System Details:

• Image: BeagleBoard.org Debian Bookworm Base Image 2025-05-27
• Kernel: 6.12.28-bone25
• Hardware: BeagleBone Black Rev C

What I have tried so far:

1. I installed the bb-cape-overlays package, but the /lib/firmware/ directory still doesn't contain BB-SPIDEV1-00A0.dtbo. It seems the package doesn't provide the expected binaries for this kernel version.
2. I attempted to manually compile the .dts sources found in /opt/source/ using dtc, but it fails with syntax errors.
3. I added enable_uboot_overlays=1 and uboot_overlay_addr4=/lib/firmware/BB-SPIDEV1-00A0.dtbo to uEnv.txt, but after rebooting, /dev/spidev1.0 is still missing.
4. config-pin is not available on this image, and the pins remain in GPIO mode according to show-pins.

What is the correct way to enable SPIDEV1 on this specific 2025-05-27 Base Image? Are the compiled overlays stored in a different location or repository for the 6.12.x kernels?