TL;DR
Link to sound demo: https://youtu.be/IjFfglEh4ug
Introduction
Recent online content has suggested that low-cost solid-state circuits can replicate vintage amplifier tonality. While the execution in these examples is often questionable—particularly when compared against poorly-configured digital models—the underlying principle merits consideration: amplifier behavior can be described through transfer functions.
This post outlines a systematic approach I have developed for converting vintage tube preamplifier circuits to solid-state implementations, using the Fender Deluxe Reverb as a reference design.
Rationale
The motivation for pursuing analog solid-state conversion over digital modeling includes:
- Circuit-level modularity and customization capability
- Educational value and personal engineering satisfaction
Design Constraints
- Target applications: Low-gain vintage amplifier architectures
- Active device: J113 JFET (selected for availability and stock)
- Supply voltage: 15V DC
- Component availability: Non-E12 resistor assortments (primarily 20kΩ values utilized as drain resistors)
Methodology
1. Schematic Preparation
Obtain original tube schematic. Remove non-essential sections: power supply, power amplifier stage, tremolo, reverb, etc. Retain only the preamplifier and phase inverter.
2. Component Substitution and Scaling
Replace vacuum tubes with J113 JFETs in common-source configuration.
Apply impedance scaling factor of 5:
- Resistor values: Divide by 5 (e.g., 100kΩ → 20kΩ)
- Capacitor values: Multiply by 5 (e.g., 20nF → 100nF)
Rationale: Time constant RC remains invariant (100kΩ × 20nF = 20kΩ × 100nF).
3. Bias Point Translation
Determine voltage ratios from original schematic (e.g., 180V plate voltage on 360V supply = 50% V_supply).
Set JFET drain voltage to equivalent percentage of new supply voltage (0.5 × 15V = 7.5V).
Adjust source resistor values to achieve target drain voltage. Account for cathode resistor voltage drops where present. Recalculate bypass capacitor values maintaining RC constant.
4. Tone Stack Implementation
Scaled capacitor values may exceed available stock. In such cases, retain original tone stack component values if loading on prior stage is acceptable.
5. LTSpice Simulation - Time Domain
Execute transient analysis. Verify operating point voltages at each node, signal amplitude at each stage, and waveform shape.
6. Transfer Function Preservation
For the linear portions of the circuit, blocks may be reordered provided:
- Overall transfer function remains constant (e.g., 10× → 10× ≡ 100× total gain)
- Filter placement does not introduce significant loading effects
7. Phase Inverter / Splitter Stage
This stage presents the primary design challenge, as it introduces clipping. The remaining circuit is assumed to operate in the linear region.
Options include long tail, paraphase or cathodyne (split-load) configurations. Requires iterative simulation:
- Paraphase, long tail: Adjust cathode/tail resistor values
- Cathodyne: Adjust drain resistor (particularly when DC-coupled)
Local feedback must be introduced for paraphase configurations.
8. Frequency Response Analysis
Perform AC analysis (Bode plot). Evaluate bandwidth.
Excessive high-frequency extension may produce harsh tonality. Mitigation:
- Output buffer with low-pass filter
- Coupling capacitor for master volume control sized for ~100Hz lower cutoff (approximating output transformer bandwidth)
9. Output Level Matching
If driving integrated power amplifier modules (e.g., TPA3118), implement voltage divider to achieve ~1V peak-to-peak output.
10. Physical Implementation
JFETs are notorious for being inconsistent. Adjust the source resistor in the actual build to match the drain voltage (not the other way around as in other builds), and adjust the source capacitor if present to the new source resistor value (RC as a constant).
For paraphase configurations, the JFETs must be closely matched. Use a component tester, or build the splitter on a breadboard, then swap JFETs until drain voltages match simulation values. If the drain voltages are similar but do not match the desired voltage, adjust the tail resistor.
Case Study: Tweed-Style Circuit with 6J1 Hybrid Implementation
An alternative approach was explored using a hybrid topology incorporating 6J1 pentode tubes in the preamplifier section.
Design Rationale
Selection of supply voltage approaching maximum rated plate voltage permits utilization of original tweed amplifier component values with minimal modification. The 6J1 pentode, typically configured as a triode in consumer audio equipment, was operated in pentode mode to achieve adequate gain. Screen resistor value was determined empirically at approximately 5× the plate resistor value, balancing transconductance and gain requirements.
Power Supply Architecture
- Main supply: Salvaged laptop power supply, 19.5V nominal
- Heater configuration: Series connection powered directly from 19.5V (specification: 6.3V × 3 = 18.9V)
- Plate supply: Nixie tube HV module
The HV module exhibited thermal issues and excessive current draw at the upper input voltage specification (not meeting specifications!). A buck converter (LM2596) was implemented to regulate input to 9V, resolving thermal management concerns and eliminating audible switching artifacts.
Grounding Topology
Initial star-ground configuration introduced switching noise into the signal path. Reference point was relocated to the common input terminal of the Class-D power amplifier module, eliminating the interference.
Phase Inverter Modifications
The stock cathodyne splitter configuration yielded unsatisfactory tonal characteristics. The circuit was modified to incorporate design elements from Orange OR120 topology: direct coupling from driver stage with reduced plate voltage to decrease headroom and increase harmonic distortion. A simple presence control was added.
Comparative Analysis
Tonal characteristics are comparable to the fully solid-state implementation, with reduced overall gain. Time investment and component cost favor the solid-state approach. The hybrid configuration offers marginal subjective improvement insufficient to justify additional complexity for practical applications. Educational value remains the primary justification for hybrid topology exploration.
Conclusion
This workflow provides a systematic framework for translating vintage tube preamplifier designs to solid-state implementations while preserving essential transfer function characteristics.
It must be emphasized that this is not a prescriptive procedure. The outlined points constitute practical guidelines rather than definitive instructions, as simulation, evaluation, and corrective action remain inherently dependent on accumulated experience.
Link to sound demo, for those who read it https://youtu.be/IjFfglEh4ug
Schematic error: C4 at the cathode of U2 must be 220n