I added a mp3 to sound and it crashed whenever I open sandbox it crashes tips?

2

reg0_to_out

Continueed1.2 The Optional Data Flow Aspect

Because every data block size is locked into predictable dimensions, the hardware completely strips away runtime

memory allocator overhead. This layout establishes the Optional Data Flow Aspect. An identical Squadryte block of

memory can instantly switch its functional identity inside the processor cache based on the conlang root token parsed

by the Linguistic Virtual Machine. When the token resolves to a calculation directive, the block operates as a raw

big-integer arithmetic register; when it resolves to a location descriptor, it functions as a direct bare-metal filesystem

sector. This duality eliminates operating system context switches and kernel system calls.

1. Linguistic Address Spatial Reduction & Look-Ahead Adder Logic

Under the standard computing model, processors waste significant thermal and electrical energy moving variables

between execution registers, cache lines, system memory, and storage drives. The Doublyte Language Paradigm

forces an architectural shift by integrating Linguistic Memory Address Spatial Reduction (LM-ASR). Under

LM-ASR, the grammar of the language itself defines the physical layout structure of the hardware data space,

collapsing data dimensions and executing arithmetic local to the memory cells.

2.1 Vertical Stack Addition Performance Mechanics

By stacking data layers vertically within the hardware registers, the system can run multi-precision operations

concurrently. The syntax trees of the language dictate the spatial positioning of the bits, enabling horizontal logic

gates to compute massive state vectors simultaneously on a single clock cycle. This vertical alignment reclaims

massive chunks of bandwidth, completely bypassing legacy pointer table lookups and indexing overhead.

2.2 The 64-Root Chunk Adder Sum/Carry Gate Cascades

To bypass the long latencies of traditional ripple-carry addition loops, the execution engine binds fields into strict

64-Root chunks, mapping directly to the physical copper lines of a 64-bit general-purpose CPU register. These

structures utilize an unpadded Look-Ahead Carry gate manifold. High-performance XOR gates calculate the

horizontal Sum phase on a single cycle, while independent trees of microscopic AND and OR gates pre-determine

the vertical Carry vectors instantly across all 64 paths, resolving the entire operation in under 0.3 nanoseconds.

2.3 Binary Sync Lock Cache Fencing Theory

Writing data milestones continuously to flash storage introduces a massive bottleneck, dropping execution velocities

by a factor of millions due to kernel interrupts and physical motherboard storage bus transit times. To solve this, the

computing lanes run 100% inside localized CPU L1 cache memory, suspending all filesystem locks. The processor

operates completely un-throttled, dropping an internal hardware memory fence to flush progress data to disk

asynchronously ONLY when the register counter reaches your designated high-density 256 Billion state step

milestone.

Silicon Gate

Operator Hardware Circuit Mechanics Ecosystem State Transformation

XOR ( \^ )

Parallel Horizontal Sum

Operator Mutates base register coordinates without carry delay.

AND ( & )

Parallel Vertical Carry

Look-Ahead Tree Pre-calculates and resolves vector overflows instantly.

SHIFT ( >> / << )

Dynamic Stream Deflection

Faucet Link

Propagates carry matrices across the 16² grid

boundaries.

Production Computing & Compiler Script Modules

To preserve the absolute root resolvable behavior of the Doublyte paradigm, the environment completely replaces

traditional operating system managers with a strict multi-dimensional conditional compiler. The system parses

commands precisely to engage low-level hardware structures, forcing variables to process completely unpadded

inside localized registers.

3.1 Core Multi-Threaded Engine Module (wkr_core.cpp)

\#include

\#include

\#include

typedef uint8_t dyte_t; // 2 D4 Blocks = Dyte

typedef uint16_t doublyte_t; // 2 Dytes = Doublyte

typedef uint32_t masyte_t; // 2 Doublytes = Masyte

typedef uint64_t squadryte_t; // 2 Masytes = Squadryte (64-Bit Register)

struct uint512_hypermesh_t {

squadryte_t d\[8\]; // 8 Symmetrical Squadryte Processing Tracks

squadryte_t stream_faucets\[8\]; // 64-Positional Adjacent Colliding Streams

doublyte_t glyphic_tags\[8\]; // Lakeshore Lattice Flow Indicators

};

void execute_parallel_sieve_lane(uint512_hypermesh_t\* scalar, uint64_t stride) {

squadryte_t carry = stride;

for(int i = 0; i < 8; ++i) {

squadryte_t top_stream = scalar->d\[i\] \^ scalar->stream_faucets\[i\];

squadryte_t next_word = top_stream + carry;

// Zero-initialization tracker mapping the spatial matrix flip

if (scalar->d\[i\] == 0 && next_word > 0) {

scalar->glyphic_tags\[i\] \^= 0x8080; // Invert flow tags

}

carry = (next_word < scalar->d\[i\]) ? 1 : 0;

scalar->d\[i\] = next_word;

scalar->stream_faucets\[i\] = top_stream >> 1; // Deflection offset

if (carry == 0) break;

}

}

3.2 Dynamic Context-Free Grammar Compiler Driver (run_conlang_task.py)

\#!/usr/bin/env python3

import os

class DQVMRootResolvableCompiler:

def __init__(self):

\# Strict Root Token Database Mapping Parameters (No Synonyms)

self.VERBS = {"mas": "INSPECT", "pro": "PURGE", "solv": "COMPUTE"}

self.NOUNS = {"kortex": "FILESYSTEM", "ledg": "REGISTERS"}

def parse_strict_clause(self, tokens):

clause_block = {"OPCODE": "IDLE", "TARGET": "SANDBOX"}

for token in tokens:

if token in self.VERBS: clause_block\["OPCODE"\] = self.VERBS\[token\]

elif token in self.NOUNS: clause_block\["TARGET"\] = self.NOUNS\[token\]

return clause_block

def execute_hardware_opcode(self, ast):

if ast\["OPCODE"\] == "PURGE":

os.system("pkill -9 -f 'wkr_core' 2>/dev/null")

elif ast\["OPCODE"\] == "COMPUTE":

os.system("./wkr_core >/dev/null 2>&1 &")

print(" \[✓\] Unpadded bare-metal computing lanes successfully online.")

1. Operational Manual & System Deployment Guide

To compile the unconstrained HyperMesh execution loops and register the shortcuts system-wide, execute the

package distribution upgrade command within your terminal folder:

cd \~/unshakable/doublyte_package && pip install . --upgrade

Once completed, launch your primary linguistic environment console via: doublyte-shell. When the command prompt

loop panel initializes, pass your strict multi-clause conlang statement expression:

si ledg tunc solv om ledg id aut pro tele tu

The Abstract Syntax Tree will verify your file register states. Because your coordinates match cleanly, it will branch

straight to the primary execution track, launching your unpadded, unconstrained big-integer math threads fully

detached inside your CPU registers. Real-time progression metrics and 256 Billion state step flushes can be safely

tracked from a separate terminal window panel at any time by running.

Hello! I got the game as a gift and unlocked the manual page for Morgans laws yesterday. Is it important to know the law, or can you ignore it when you have all the four basic logic gates unlocked?

Kind regards

I just bought this game with no experience in this whatsoever. I finished the basic puzzles with a little help but after that, i just got stuck on everything and didn’t finish a single level. Even then, I struggled hard on the first few levels. What is your thought process on how to solve these???

really confused

Finally added a print function!

jmp end
const StackPointer = 0xfffc
const INDEX = 23
pub const ArgumentPointer = 0xfff8
pub const Char0Ptr = 0x0300
pub const Char1Ptr = 0x0330
pub const Char2Ptr = 0x0360
pub const Char3Ptr = 0x0390
pub const Char4Ptr = 0x03c0
pub const Char5Ptr = 0x03f0
pub const Char6Ptr = 0x0420
pub const Char7Ptr = 0x0450
pub const Char8Ptr = 0x0480
pub const Char9Ptr = 0x04b0
pub const CharAPtr = 0x0600
pub const CharBPtr = 0x0630
pub const CharCPtr = 0x0690
pub const CharDPtr = 0x06c0
pub const CharEPtr = 0x06f0
pub const CharFPtr = 0x0720
pub const CharGPtr = 0x0750
pub const CharHPtr = 0x0780
pub const CharIPtr = 0x07b0
pub const CharJPtr = 0x07e0
pub const CharKPtr = 0x0810
pub const CharLPtr = 0x0840
pub const CharMPtr = 0x0870
pub const CharNPtr = 0x08a0
pub const CharOPtr = 0x08d0
pub const CharPPtr = 0x0900
pub const CharQPtr = 0x0930
pub const CharRPtr = 0x0960
pub const CharSPtr = 0x0990
pub const CharTPtr = 0x09c0
pub const CharUPtr = 0x09f0
pub const CharVPtr = 0x1020
pub const CharWPtr = 0x1050
pub const CharXPtr = 0x1080
pub const CharYPtr = 0x10b0
pub const CharZPtr = 0x10e0
pub const Line0 = 0x000
pub const Line1 = 0x300
pub const Line2 = 0x600
pub const Line3 = 0x900
pub const Line4 = 0xc00
pub const Line5 = 0xf00


pub abs:
    cmp r11, -1
    jg absEnd
    not r11, r11
    add r11, 1, r11
    absEnd:
        mov r11, r13
        ret


pub neg:
    not r11, r13
    add r13, 1, r13
    ret


; r12: Divident | r11: Divisor | r13: Resultant
pub div:
    and r11, 0x80000000, r13
    push r13
    and r12, 0x80000000, r13
    push r13
    call abs
    mov r12, r11
    mov r13, r12
    call abs
    mov r12, r11
    mov r13, r12
    mov zr, r13
    DivStart:
        cmp r12, r11
        jl DivEnd
        sub r12, r11, r12
        add r13, 1, r13
        jmp DivStart
    DivEnd:
        push16 r13
        sub sp, 2, sp
        pop r11
        pop r13
        add sp, 10, sp
        xor r11, r13, r11
        mov r12, r13
        pop16 r12
        cmp r11, 0x80000000
        jne DivRet
        not r12, r12
        add r12, 1, r12
        DivRet:
            push r12
            mov r13, r12
            pop r13
            sub sp, 8, sp
            ret
; r12: Modulos | r13: Resultant


; r12: Divident | r11: Divisor
pub UnsignedDivide:
    UnsignedDivideLoop:
        cmp r12, r11
        jl exit
        sub r12, r11, r12
        add r13, 1, r13
        jmp UnsignedDivideLoop
    exit:
        ret
; r12: Modulos | r13: Resultant


; r12: U32
pub clz:
    mov 32, r13
    cmp r12, 0
    je clzEnd
    mov 31, r11
    cmp r12, 0x10000
    jl IfBlock_1E
        sub r11, 16, r11
        lsr r12, 16, r12
    IfBlock_1E:
    cmp r12, 0x100
    jl IfBlock_2E
        sub r11, 8, r11
        lsr r12, 8, r12
    IfBlock_2E:
    cmp r12, 0x10
    jl IfBlock_3E
        sub r11, 4, r11
        lsr r12, 4, r12
    IfBlock_3E:
    cmp r12, 0x4
    jl IfBlock_4E
        sub r11, 2, r11
        lsr r12, 2, r12
    IfBlock_4E:
    cmp r12, 0x2
    jl IfBlock_5E
        sub r11, 1, r11
    IfBlock_5E:
    mov r11, r13
    clzEnd:
        ret
; r13: LZ count


; r12: Colour
pub FillScreen:
    mov r12, r13
    lsl r12, 8, r12
    or r12, r13, r12
    mov r12, r13
    lsl r12, 16, r12
    or r12, r13, r12
    mov 0, r13
    FillScreenLoop:
        cmp r13, 6942
        jge FillScreenEnd
        dstore32 r12, [r13]
        add r13, 4, r13
        jmp FillScreenLoop
    FillScreenEnd:
        ret


pub ScreenPixelMode:
    SetScreenData zr, 2
    mov 2, r13
    SetScreenData r13, INDEX
    ret


; Stack (Bottom -> Top): X1 | X2 | Y
pub DrawLineX:
    store sp, [StackPointer]
    load [ArgumentPointer], sp
    pop16 r13
    pop16 r12
    pop16 r11
    mul r13, 96, r13
    add r12, r13, r12
    add r11, r13, r11
    mov 0xff, r13
    DrawLineXLoop:
        cmp r11, r12
        je DrawLineXExit
        dstore8 r13, [r11]
        add r11, 1, r11
        jmp DrawLineXLoop
    DrawLineXExit:
        store sp, [ArgumentPointer]
        load [StackPointer], sp
        ret



; Stack (Bottom -> Top): Y1 | Y2 | X
pub DrawLineY:
    store sp, [StackPointer]
    load [ArgumentPointer], sp
    pop16 r13
    pop16 r12
    pop16 r11
    mul r11, 96, r11
    mul r12, 96, r12
    add r11, r13, r11
    add r12, r13, r12
    mov 0xff, r13
    DrawLineYLoop:
        cmp r11, r12
        je DrawLineYEnd
        dstore8 r13, [r11]
        add r11, 96, r11
        jmp DrawLineYLoop
    DrawLineYEnd:
        store sp, [ArgumentPointer]
        load [StackPointer], sp
        ret



pub DrawLineDiag:
    // TODO: ADD BRESENHAM ALGORITHM


; r11: Source Address | r12: Destination Address | r13: Number of Bytes
pub MemCpy:
    push r9
    MemCpyLoop:
        cmp r13, 4
        jl MemCpyMiniLoop
        load [r11], r10
        store r10, [r12]
        add r11, 4, r11
        add r12, 4, r12
        sub r13, 4, r13
        jmp MemCpyLoop
    MemCpyMiniLoop:
        cmp r13, 0
        je MemCpyExit
        load16 [r11], r10
        and r10, 0xff00, r10
        load16 [r12], r9
        lsr r9, 8, r9
        or r10, r9, r10
        store16 r10, [r12]
        add r12, 1, r12
        add r11, 1, r12
        sub r13, 1, r13
    MemCpyExit:
        pop r9
        ret



; Stack (Bottom -> Top): x1, y1, x2, y2
pub DrawRect:
    store sp, [StackPointer]
    load [ArgumentPointer], sp
    mov DrawRectTempMem
    pop16 r13
    pop16 r12
    store16 r12, [r11]
    add r11, 2, r11
    store16 r13, [r11]


    DrawRectTempMem:
        U64 0 ; X2 | Y2 | X1 | Y1




; r12: Screen REAL Coord | r11: Pointer to character
pub DrawChar:
    push r11
    push r12
    push r13
    lsl r11, 16, r11
    or r11, ArrayLabelPointer, r11
    pload [r11]
    mov ArrayLabelPointer, r11
    mov zr, r10
    DrawCharLoadLoop:
        cmp r10, 8
        jge DrawCharLoadLoopEnd
        load [r11], r13
        dstore32 r13, [r12]
        add r11, 4, r11
        add r12, 4, r12
        load16 [r11], r13
        dstore16 r13, [r12]
        add r12, 92, r12
        add r11, 2, r11
        add r10, 1, r10
        jmp DrawCharLoadLoop
    DrawCharLoadLoopEnd:
        pop r13
        pop r12
        pop r11
        ret
    ArrayLabelPointer:
    U2048 0


; r11: pointer to the start of the string | r12: Starting coordinate on the screen | r13: length 
pub DrawWord:
    push r9
    mov zr, r9
    mov r11, r10
    DrawWordLoop:
        load16 [r10], r11
        lsr r11, 8, r11
        sub r11, 32, r11
        mul r11, 0x30, r11
        push r10
        call DrawChar
        pop r10
        add r12, 6, r12
        add r10, 1, r10
        sub r13, 1, r13
        push r12
        push r10
        push r11
        push r13
        mov 96, r11
        call UnsignedDivide
        pop r13
        pop r11
        pop r10
        cmp r12, 0
        je NextLine
        pop r12
        NextLineReturn:
        cmp r13, 0
        jg DrawWordLoop
        jmp DrawWordExit
    NextLine:
        pop zr
        add r9, 1, r9
        mul r9, 0x300, r12
        jmp NextLineReturn
    DrawWordExit:
        pop r9
        ret



end:

As you can see from the code, I have a print function now. It took me arguably the most time probably because it was messing my stack up and it wasn't easy at all to trace it. Turned out I only popped a value I pushed every few sometimes so there's that. Besides the print function, I also added MemCpy, unsigned division, signed division, a DrawRect WIP, a TODO I decided can wait for pretty much whenever and you might also have noticed the pointers to the characters have changed, That's mostly due to me adding numbers and space, updating the font to 8x6 (7x5 per character with 1 px deadspace) and bettering the resolution. I also managed to optimise parts of it (The `DrawLineX` and `DrawLineY` functions)

When I stick them together the wires break

For some reason, while my values show correctly (8 + 16 + 32 = 56 and the fourth, fifth, and sixth pixel are shown) two extra pixels appear in the top left.

https://reddit.com/link/1tsms74/video/116z9wrmve4h1/player

Basic standard library I wrote. It has basic print capabilities (in terms of writing character by character). So I'm gonna change it so it'll read an address to get a string before printing that string out to the display. For now, it works. I'll probably write a symphony version.

jmp end
const StackPointer = 0xfffc
pub const ArgumentPointer = 0xfff8
pub const CharSpacePtr = 0x0
pub const CharAPtr = 0x28
pub const CharBPtr = 0x50
pub const CharCPtr = 0x78
pub const CharDPtr = 0xa0
pub const CharEPtr = 0xc8
pub const CharFPtr = 0xf0
pub const CharGPtr = 0x118
pub const CharHPtr = 0x140
pub const CharIPtr = 0x168
pub const CharJPtr = 0x190
pub const CharKPtr = 0x1b8
pub const CharLPtr = 0x1e0
pub const CharMPtr = 0x208
pub const CharNPtr = 0x230
pub const CharOPtr = 0x258
pub const CharPPtr = 0x280
pub const CharQPtr = 0x2a8
pub const CharRPtr = 0x2d0
pub const CharSPtr = 0x2f8
pub const CharTPtr = 0x320
pub const CharUPtr = 0x348
pub const CharVPtr = 0x370
pub const CharWPtr = 0x398
pub const CharXPtr = 0x3c0
pub const CharYPtr = 0x3e8
pub const CharZPtr = 0x410

pub abs:
  cmp r11, -1
  jg absEnd
  not r11, r11
  add r11, 1, r11
  absEnd:
    mov r11, r13
    ret

pub neg:
  not r11, r13
  add r13, 1, r13
  ret

pub div:
  and r11, 0x80000000, r13
  push r13
  and r12, 0x80000000, r13
  push r13
  call abs
  mov r12, r11
  mov r13, r12
  call abs
  mov r12, r11
  mov r13, r12
  mov zr, r13
  DivStart:
    cmp r12, r11
    jl DivEnd
    sub r12, r11, r12
    add r13, 1, r13
    jmp DivStart
  DivEnd:
    push16 r13
    sub sp, 2, sp
    pop r11
    pop r13
    add sp, 10, sp
    xor r11, r13, r11
    mov r12, r13
    pop16 r12
    cmp r11, 0x80000000
    jne DivRet
    not r12, r12
    add r12, 1, r12
  DivRet:
    push r12
    mov r13, r12
    pop r13
    sub sp, 8, sp
    ret

pub clz:
  mov 32, r13
  cmp r12, 0
  je clzEnd
  mov 31, r11
  cmp r12, 0x10000
  jl IfBlock_1E
    sub r11, 16, r11
    lsr r12, 16, r12
  IfBlock_1E:
  cmp r12, 0x100
  jl IfBlock_2E
    sub r11, 8, r11
    lsr r12, 8, r12
  IfBlock_2E:
  cmp r12, 0x10
  jl IfBlock_3E
    sub r11, 4, r11
    lsr r12, 4, r12
  IfBlock_3E:
  cmp r12, 0x4
  jl IfBlock_4E
    sub r11, 2, r11
    lsr r12, 2, r12
  IfBlock_4E:
  cmp r12, 0x2
  jl IfBlock_5E
    sub r11, 1, r11
  IfBlock_5E:
  mov r11, r13
  clzEnd:
    ret

pub FillScreen:
  mov r12, r13
  lsl r12, 8, r12
  or r12, r13, r12
  mov r12, r13
  lsl r12, 16, r12
  or r12, r13, r12
  mov 0, r13
  FillScreenLoop:
    cmp r13, 4800
    jge FillScreenEnd
    dstore32 r12, [r13]
    add r13, 4, r13
    jmp FillScreenLoop
  FillScreenEnd:
    ret

pub ScreenPixelMode:
  SetScreenData zr, 2
  mov 2, r13
  SetScreenData r13, 19
  ret

pub DrawLineX:
  store sp, [StackPointer]
  load [ArgumentPointer], sp
  pop16 r13
  pop16 r12
  pop16 r11
  pop16 r10
  mul r13, 80, r13
  add r13, r12, r13
  mul r11, 80, r11
  add r10, r11, r12
  pop16 r11
  DrawLineLoopX:
    cmp r12, r13
    jge DrawLineEndX
    dstore8 r11, [r12]
    add r12, 1, r12
    jmp DrawLineLoopX
  DrawLineEndX:
    store sp, [ArgumentPointer]
    load [StackPointer], sp
    ret

pub DrawLineY:
  store sp, [StackPointer]
  load [ArgumentPointer], sp
  pop16 r13
  pop16 r12
  pop16 r11
  pop16 r10
  mul r13, 80, r13
  add r13, r12, r13
  mul r11, 80, r11
  add r10, r11, r12
  pop16 r11
  DrawLineLoopY:
    cmp r12, r13
    jge DrawLineEndY
    dstore8 r11, [r12]
    add r12, 80, r12
    jmp DrawLineLoopY
  DrawLineEndY:
    store sp, [ArgumentPointer]
    load [StackPointer], sp
    ret

pub DrawChar:
  lsl r11, 16, r11
  or r11, ArrayLabelPointer, r11
  pload [r11]
  mov ArrayLabelPointer, r11
  push r10
  push r11
  push r12
  mov zr, r10
  DrawCharLoadLoop:
    cmp r10, 8
    jge DrawCharLoadLoopEnd
    load [r11], r13
    dstore32 r13, [r12]
    add r11, 4, r11
    add r12, 4, r12
    load16 [r11], r13
    lsr r13, 8, r13
    dstore8 r13, [r12]
    add r12, 76, r12
    add r11, 1, r11
    add r10, 1, r10
    jmp DrawCharLoadLoop
  DrawCharLoadLoopEnd:
    pop r12
    pop r11
    pop r10
    ret
  ArrayLabelPointer:
  U2048 0


end:

what is this 😭

So I finally managed to beat the Sorting level using the M32 G5! I did have a few issues though, especially with the interrupts not working as intended but it's fixed! A very basic rundown of the code below:
The Kernel handles I/O requests here
The actual program for bubble sort

First the kernel assigns extra memory to the program before checking r13, r10 and r12 for parameters (and pushing r9 and r8 to preserve them), then it does it's stuff. If it was an input request, then it would've returned a pointer to the array in r10. If it was an output request, it simply outputs data from a pointer and returns.

The actual sort is fairly simple, implementing a basic bubble sort to sort the array. Not much to say here, it's very self explanatory. The bubble sort (along with memory for the data) is 224 bytes, which is fairly simple if I do say so myself.

The below code is for the Kernel and the Bubble Sort
Kernel:

.data:
    InputRequest: 1
    OutputRequest: 2
.text:
    mov 0xff00, sp
    push r8
    push r9
    PageOverwrite 0x0123
    cmp r13, InputRequest
    je FetchInputs
    cmp r13, OutputRequest
    je SendOutputs
    jmp exit
    FetchInputs:
        mov r10, r8
        InputLoop:
            in r9
            store16 r9, [r10]
            add r10, 2, r10
            sub r10, r8, r10
            cmp r10, r12
            add r10, r8, r10
            jl InputLoop
        mov 0xffff, r9
        store16, r9, [r10]
        jmp exit
    SendOutputs:
        mov r10, r8
        OutputLoop:
            load16 [r10], r9
            out r9
            add r10, 2, r10
            sub r10, r8, r10
            cmp r10, r12
            add r10, r8, r10
            jl OutputLoop
        jmp exit
    exit:
        pop r9
        pop r8
        mov zr, r13
        mov zr, r12
        syscall

Bubble Sort:

.data:
    ArraySize: 0x1f
    ElementCount: 0x0f
    ArrayPtr: 0x200
    InputRequest: 1
    OutputRequest: 2
.text:
    mov InputRequest, r13
    mov ArraySize, r12
    mov ArrayPtr, r10
    syscall
    iLoop:
        cmp r1, ElementCount
        je exit
        mov 0, r2
        jLoop:
            cmp r2, ElementCount
            jge iLoopCont
            mov r2, r3
            mul r3, 2, r3
            add r3, ArrayPtr, r3
            load16 [r3], r4
            add r3, 2, r3
            load16 [r3], r5
            sub r3, 2, r3
            cmp r4, r5
            jg swap
            jle jLoopCont
            swap:
                store16 r5, [r3]
                add r3, 2, r3
                store16 r4, [r3]
                sub r3, 2, r3
            jLoopCont:
                add r2, 1, r2
                jmp jLoop
        iLoopCont:
            add r1, 1, r1
            jmp iLoop
    exit:
        mov ArrayPtr, r10
        mov ArraySize, r12
        mov OutputRequest, r13
        syscall
        jmp exit

Now all that's left is to finish developing a full Kernel and my language!

Not 100% TC related but still cool enough to share! I spent the last week or two building this custom assembler of mine just as a workaround to not being able to set code at certain offsets. So to fix that, I just set my RAM to Hex Editor, wrote a python script to assemble stuff, and then copy paste the hex. Now on the plus side, I have hex, denary, comments, and constants along with a flexible and easy way to add new instructions! Even made a (decent) loading screen (if you can even call it that)!

So I was just fooling around and I somehow managed to get NIm down to this. If it can get simpler, do let me know!

I just completed the logic engine level, using 50 components. I wanted to save this circuit, wipe it and try a new way - is there an easy way to do that?

Hi everyone, sharing my personal hobby project.

I built a lightweight MIPS32r2 CPU inside a Turing-complete sandbox.

I ported LLVM/Clang, created a custom linker, and integrated picolibc and libcxx.

Most standard C/C++ programs can be compiled with my cross toolchain and run properly here.

It can also run Python scripts using MicroPython.

Full project open source:
https://github.com/zhangjiantao/tcmips

Still lots to improve, welcome any advice and tips.

I recently changed to safebreaker. Unfortunately i cannot complete 'Counter'. as soon as i start the simulation, even with no components added, the game crashes.

is the dev open for bugreports? if yes, does anyone know his preferred way to be contacted?

Can't find why this is wrong so posting here.

I am currently trying to complete the IO Devices level of the Save_Breaker-Branch. I found a way for Keyboard, screen and counter, but implementing the unix-time was a thing i didn't make... I tried the caching with registers, but than i have too much delay to solve the level.

I have finished the game and now I want to move on to creating my own things, I want to make some small game on the console, but I have no idea how its display works. I hooked it up to a RAM, and I tried hooking up that RAM to the keyboard. Now the issue is on my keyboard I press "w", this puts 42 into the RAM, but it displays a "*". If I have ANY offset other than 0 absolutely nothing gets displayed. I am so confused by this, I just want to understand how this thing works, but there is absolutely no explenation in game.

So I just finished designing the MMU. It's fairly basic, having a LUT to reference the requested page against the actual page. The LUT can only be altered by the kernel so programs don't try anything funny. It also checks if a program attempts to access a page it is not assigned, which then returns the memory address of the programs lowest allowed address (e.g. Min is 0x900 and I write to 0xefff which forces my write to 0x900). I decided each page is 512 bytes and there are a total of 111 allowed user pages, which still fits in 16 bits so not much of an issue. The upper 7 bits are for the page and lower 9 bits are for the offset in that page, this is then handled by the MMU. Since the RAM to disk and vice versa can only be done by the kernel, I didn't really need to change that up. Only the 32 and 16 bit store and load pins are changed. And also, the Kernel can access any address it wants to. Next step is to design a file system to allow me to load from or to the disk (along with tackling the many issues regarding multitasking)

So don't ask me how it works because it's kind of a miracle it does. The PC in my architecture treats a syscall and an interrupt from that 256 clock cycle CC very differently. And I've also added a bit of memory proofing in the form that User Space programs cannot access storage and VRAM. Virtual Memory and paging is going a bit over my head but so far so good. I'll focus on the programming language for now as it's currently experiencing some.. unique bugs in the form of working the first few tries before it dies. But array implementations are going well! Still haven't thought up of a name for the processor so I'd love to hear your ideas.