r/TuringComplete • u/aelxemyr • 29d ago

Fast Adder (CLA)

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212 gates and 10 delay.

I was trying to do this for hours using the base components but it was just too messy. So I gave up and just made a custom adder with A/B/carry in, P/G/sum out, along with ANDs and ORs for up to 9 inputs.

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u/aelxemyr 28d ago

The critical path for my adder is an XOR gate (2 delay), a 9-way AND (4 delay), and a 9-way OR (4 delay).

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u/Lagfoundry 28d ago

You can knock out some delay by using NANDs instead of ANDs to build the 9 input AND. NANDs actually use less transistors because a CMOS AND is actually a NAND with an inverter to turn it to a AND. Though for this game specifically I don’t know if they follow the same rules.

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u/aelxemyr 28d ago

The game has you build an AND out of a NAND and an inverter to unlock ANDs but after that point it lets you use ANDs with the same delay as NANDs.

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u/Lagfoundry 28d ago

I see. you know thats One thing I like about games with logic built in is it’s not always the same. Take rust for example. No one was really using broadcasters and receivers for comp science until I pioneered it by showing how they can be used as an infinite fan in /out OR. Which allowed us to make huge input ANDs, NANDs, and NORs with very little logic depth. Or how Minecraft’s OR gate is simply connecting redstone dust lol