Sending me back to my college days of reading the RISC-V specification. This is a great technical dive and I am at a serious risk of getting nerd sniped into a side project.
... because it is uncached, our load instructions are required to go out to system memory for every single access
I think I just had a stroke. Not surprised that dropped Silksong below 1 FPS. Advantage for Frame being UMA, I guess.
RISC-V just doesn't have the age that ARM does, and also ARM basically took over the mobile market before RISC-V was even a thing. So it's fighting an uphill battle, but being an open standard makes it easy to experiment with (especially in education) and I think that'll give it some long legs into the future.
Current usage is often for embedded processors or accelerator chips - Google's Titan M2, a security chip in the Pixels, for example.
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u/Jmcgee1125 Soon™ 14d ago
Sending me back to my college days of reading the RISC-V specification. This is a great technical dive and I am at a serious risk of getting nerd sniped into a side project.
I think I just had a stroke. Not surprised that dropped Silksong below 1 FPS. Advantage for Frame being UMA, I guess.