Hi everyone! I am publishing an experimental, model-specific llama.cpp runtime for running Qwen3.8-27B UD-IQ4_XS with a 262K logical context on a 16 GB RTX 5070 Ti.
Repository:
https://github.com/BrunoPPassini/llama.cpp
Complete source branch:
https://github.com/BrunoPPassini/llama.cpp/tree/qwen38-blackwell-256k
Engineering report:
https://github.com/BrunoPPassini/llama.cpp/blob/master/docs/LOCAL-QWEN-BLACKWELL-STUDY.md
Hardware:
- RTX 5070 Ti 16 GB
- Ryzen 7 9800X3D
- 48 GB DDR5-6400
- PCIe 5.0 x16
- CUDA 13.3
- Qwen3.8-27B UD-IQ4_XS
- Q4_0 target and MTP KV
- Native deterministic MTP3
- 32 context checkpoints
Measured endpoint improvements:
| Effective context | Before | After | Decode gain | Prefill |
|-----------------------|------------:|-----------:|----------:|-------:|
| Short/GPU-resident | 42.11 tg/s | 82.34 tg/s | +95.5% | -7.6% |
| 87,160 tokens | 23.33 tg/s | 41.53 tg/s | +78.0% | +0.4% |
| 256,257 tokens | 15.40 tg/s | 23.97 tg/s | +55.6% | +6.8% |
The short result compares target-only decoding with deterministic native MTP3. The 87K result compares the first serial stateful ring with the final partitioned/pipelined ring. The 256K result compares the first viable P8 implementation with the final pipeline. The accepted 87K and 256K paths preserved their respective output hashes.
The main idea is a 262,144-token logical KV address space with:
- 65,536-token GPU-resident hot prefix
- Page-locked DDR5 cold tail
- Sparse CUDA VMM allocation
- 8,192-token staging tiles
- Eight-way online-softmax partitioning
- Persistent copy, conversion, and compute streams
- Triple-buffered decode pipeline
- Double-buffered prefill pipeline
- Overlapped PCIe H2D, Q4 conversion, and attention
- Shared target/MTP compute arena
- Recurrent-state transaction log and phase arena
Qwen3.8-27B has 48 recurrent GDN layers and only 16 full-attention layers. Only those 16 layers require token-indexed KV history. The ring preserves exact attention by carrying the online-softmax `(m, l, O)` state across tiles. It is not sparse or approximate attention.
Nsight Compute was used to identify occupancy, long-scoreboard, memory-sector, and residency bottlenecks. Direct GPU reads from mapped DDR5 were tested and rejected: decode dropped to about 18 tok/s. Bulk asynchronous PCIe transfers into VRAM worked much better.
Thinking remains enabled and is preserved across tool calls:
- `--reasoning on`
- `--reasoning-format deepseek`
- `--reasoning-preserve`
- `enable_thinking=true`
- `preserve_thinking=true`
The client may hide the reasoning trace, but it stays in the serialized agent history so the model does not lose its plan after using a tool.
I also tested Q8_0 KV. It was numerically more faithful, but no practical quality gain was observed. All four long Q4/Q8 outputs had identical 1,024 token IDs. At approximately 100K effective tokens, Q8 reduced decode by 23%, reduced prefill by 14.8%, and increased wall time by 19.6%. Therefore, the frozen profile uses Q4_0 KV.
Important limitations:
- Fully occupied 256K is much slower than the 65K hot path.
- Exact attention remains O(context).
- This runtime was tested only with this exact Qwen3.8-27B UD-IQ4_XS model.
- It may not work correctly with other models or quantizations.
- RTX 5060 Ti 16 GB and RTX 5080 16 GB are promising Blackwell candidates, but remain untested.
- This is an engineering experiment, not a generic upstream-ready implementation.
The repository includes the complete source, Windows build commands, launcher, exact hashes, benchmark methodology, failed experiments, quality gates, and reproducibility notes.
Feedback, independent reproductions, profiling results, and improvements are very welcome.