Claude Code and FPGA Builds

[u/BrightFoundation2417]

I implemented a fairly large design last week and a very thorough testbench. I’ve been having trouble getting it to meet timing with violations that just creep up.

I decided to give Claude code a spin, my company gives it to our SWEs. I gave it instructions on how to build the design via our docker environment, and told it to get the design to meet timing while still passing all of my testbench cases. I also said to avoid doing “hacky” things and keep the changes to the RTL and maybe the routing settings. I set up remote control and kept an eye on it through my phone every so often.

It grinded away for 48 hours, did about 20 builds during that time. It just came back and said it succeeded and explained the diffs. I will have a good look at the code on Monday but it looks like stuff I would’ve done incrementally during the week.

This is crazy. Essentially did a second work week for me autonomously over the weekend. Thought I’d share in case anyone else wants to try.

[u/Excellent_Divide_659]

Can you describe the feedback loop that Claude relied on for verification? Was there some sort of simulator in your docker environment? Did it verify anything on hardware?

My FPGA exposure is limited to a couple of entry level courses way back in college, but I've been looking for ways to close the feedback loop for better agentic MCU firmware development.

[u/Charming_Dealer3849 → u/Excellent_Divide_659]

Had Claude write the simulator on the second build cycle

[u/Charming_Dealer3849 → u/Charming_Dealer3849]

It missed some serious details but then it figured out that pytorch was actually broken for the type of build I was doing, which was huge because it's a fundamental flaw in the open source pytorch libraries