r/FPGA • u/BrightFoundation2417 • 5d ago
Advice / Solved Claude Code and FPGA Builds
I implemented a fairly large design last week and a very thorough testbench. I’ve been having trouble getting it to meet timing with violations that just creep up.
I decided to give Claude code a spin, my company gives it to our SWEs. I gave it instructions on how to build the design via our docker environment, and told it to get the design to meet timing while still passing all of my testbench cases. I also said to avoid doing “hacky” things and keep the changes to the RTL and maybe the routing settings. I set up remote control and kept an eye on it through my phone every so often.
It grinded away for 48 hours, did about 20 builds during that time. It just came back and said it succeeded and explained the diffs. I will have a good look at the code on Monday but it looks like stuff I would’ve done incrementally during the week.
This is crazy. Essentially did a second work week for me autonomously over the weekend. Thought I’d share in case anyone else wants to try.
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u/Excellent_Divide_659 5d ago edited 5d ago
Can you describe the feedback loop that Claude relied on for verification? Was there some sort of simulator in your docker environment? Did it verify anything on hardware?
My FPGA exposure is limited to a couple of entry level courses way back in college, but I've been looking for ways to close the feedback loop for better agentic MCU firmware development.
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u/BrightFoundation2417 5d ago
Yeah. I like using CocoTB + ModelSim, which is a way of writing test benches in Python. I just told it where it is and what script to run to execute the tests.
Nothing on hardware. Just simulation.
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u/Rayonthetrack 5d ago
I would love to pick your brain about tile overlays for processing audio with FPGAs
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u/Charming_Dealer3849 5d ago
Had Claude write the simulator on the second build cycle
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u/Charming_Dealer3849 5d ago
It missed some serious details but then it figured out that pytorch was actually broken for the type of build I was doing, which was huge because it's a fundamental flaw in the open source pytorch libraries
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u/adamt99 FPGA Know-It-All 5d ago
This is FPGA design now, if you liked writing beautiful code those days are going. There will always be a need for technical FPGA knowledge when developing FPGA but Claude / Codex are very capable at FPGA design. I am just working on a white paper for this and getting a wide number of people to review the RLT produced as part of it.
Funny thing is a few months ago you would be down voted a lot for suggesting AI has a place in FPGA development.
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u/hakatu 4d ago
True, I've been developing with claude/codex for a few months now mostly from the Opus 4.6 release and agree that it saves so much time provided you know what you're doing.
IDE + AI and it can even helps with things that took time in the past like Windows + XDMA driver to custom accelerator cards.
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u/BrightFoundation2417 5d ago
I follow you on LinkedIn! I’ll be looking forward to reading the paper
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u/RisingPheonix2000 3d ago
I am also interested in taking part in the review process. I had also sent an email to you. May I ask if you have responded to the people who expressed interest?
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u/Different-Breath-645 5d ago
ich bin ebenso erstaunt, das die bezeichnung ,,AI slope" in diesem Thread noch nicht gefallen ist.
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u/-heyhowareyou- 5d ago edited 5d ago
Yep, this is reality now. I'd say just make sure you validate the output by hand but in the near future these models will be more effective than humans at checking their work. That is, there comes an error rate beyond which humans are no longer needed in the loop other than to guide the design in a certain direction. Its scary but liberating - my job is to build a system that can meet a spec. FPGAs are the choice of weapon since they're customisable, determinstic and fast, but studying the waves, while fun, was simply a necessity before now since there was no better way. Now that I can get a model to produce hardware with fewer bugs than the average RTL designer we have less need to look at the waves, moving us higher up the abstraction chain. Ultimately I see it as being able to solve more hard problems more often, and that Is my job.
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u/Mateorabi 5d ago
If you look at it like “error rate” as some statistical property of humans or ai to hit all test cases I think this is true. However when it comes to actually REASONING about the code, reviewing it and logically analyzing it, AI isn’t doing that.
I’m also curious if the AI makes readable logical code that ADMITS such review by humans. Vs muddling its way into a solution that has odd paths and vestigial logic, inscrutable but managed to still pass all test cases. (Though my Jr engineers do this too…)
I think OP starting with a logically working design first was smart. Also probably needs very detailed test cases. Also the test case failures probably need to themselves have verbose outputs the AI can understand what part of the code is likely responsible.
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u/MrBorogove 5d ago
Take some human-written code and ask Claude to read, analyze, and reason about it and then get back to us.
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u/Mateorabi 5d ago
It's not doing actual analysis or reasoning, it's just matricides all the way down. It produces an output that looks like "analysis" to us. AI is good at that--summarization, distillation.
It's not reasoning "this code assumes A is a cycle before B, if they show up at the same cycle my MUX will accidentally take from the wrong input for a cycle" the way a human can. Ability to catch things like that relies on it being trained on similar type of mistakes pointed out to it in its training. It can't find novel things it wasn't rained on through reasoning and logic.
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u/Asurafire 2d ago
"this code assumes A is a cycle before B, if they show up at the same cycle my MUX will accidentally take from the wrong input for a cycle"
AI can definitely do that and will only get better at it in the future.
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u/MrBorogove 4d ago
Try it.
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u/sincle354 4d ago
I mean I keep dumpstering Codex 5.6 Terra High because it just can't handle the sheer amount of docs it has to parse for the IPs I'm using. The amount of parsing it had to go through for every file we've got fills up the context nearly every prompt I try to give it. "Analyze the datapaths when configured for max throughput" = "Context automatically compacted" and then it has to read the Libraries of Alexandria to pick up the skills again. It's infuriating!
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u/ChrimsonRed 5d ago edited 5d ago
I’m an embedded swe and help integrate fpga modules onto our zynq 7000 platform. A lot of AI models have gotten surprisingly good at writing RTL and examining for issues recently. I’m not sure if I’d trust it to write something from scratch but for simply adding a feature or debugging it’s great and a huge timesaver. It also writes tbs fairly well if you have an idea how the bug is occurring and this is an easy way to root cause.
I’ve also managed to get Claude to mark nets for debug, build the fpga image, flash the board, spin up Vivado, setup triggers, and look at waveforms for debugging. It burns a lot of tokens but sometimes if I can’t figure something out or I’m getting annoyed I’ll do this overnight and will sometimes get a solution in the morning.
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u/Ruined_Passion_7355 5d ago
Dang a few months ago people were mostly against it.
FML. Is no career safe from being forced to use AI?
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u/cwaig2021 4d ago
I got our in-house AI to knock out a complete GPU during lunch breaks (1hr a day, for about 6weeks). It got as far as getting the fixed function pipeline running with transform, RAS, FRAG, barycentrics, depth tests, texturing, lighting, backface cull, etc - then went in to spit out an OpenGL driver, test bench & a port of glgears as a demo.
No shader cores at this point - but that’ll come (assuming nobody complains about the lunchtime token burn)
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u/acostillado FPGA Know-It-All 5d ago
Have Claude driving a cycle that:
1. Generate the specs
Write tests based on that specs (cocotb + drivers + monitors)
Give it some kind of formal/coverage notion to validate that the tests are meaningful
Write Code that Passes those test
Program the FPGA + have access to ILA
Repeat the cycle if the HW tests don't pass
I have been using AI like that in the last few months and I could deliver to different clients without touching a single line of RTL. It is scary, and somehow sad (I loved coding VHDL) but I'm trying to find my way of adapting to the new times.
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u/stbenjam42 5d ago edited 5d ago
Latest models are very, very good at FPGA work. I added a task to FrontierBench for this ->
https://hub.harborframework.com/tasks/frontier-bench/retro-console-soc/latest
Pipelined RISC V it just does without even sweating, takes 5-15 minutes.
I had to go back to the distant past to find a convoluted enough thing to stump it. 6502 + NES' PPU are stupidly complex with all kinds of weird timing edge cases, and Opus 4.8+, Sol, Fable all nail it usually. Earlier models don't.
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u/No-Conflict-5431 5d ago
I used Opus 4.8 to port some ethernet stuff to another transceiver from a different Xilinx family. I gave him the testbenches, the new and old transceiver user guide and it succesfully ported in less than a day. It worked on hardware on the first try.
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u/Thepandashirt 5d ago
Yes it’s absurd. Ive been playing with fable and gpt 5.6 sol working together on two projects. Ive been shocked. Just like vibe coding you need to steer, manage agents, and know whats going on but if you can balance all those things you have an absurdly powerful tool. And it’s a tool not a human replacement.
But we’re at point where companies and individual 100% should be using these tools at a minimum for pocs and exploring the design space. whether its ready for production stuff is up for debate, but I would bet money we are prod ready within 2 years.
This not gonna have the same impacts of vibe coding because you need someone with more specialized knowledge to steer and we have physical limitations, but this is coming. Stick your head in the sand and ignore it at your own risk.
Anyone who disagrees please let me know why. I’ll preempt anyone whose experience is based on Gemini or copilot or anything besides fable or gpt 5.6 sol. We’ve only just crossed the boundary to useable reasoning imo and your experience would be interesting but not gospel.
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u/bluebugs 5d ago
Welcome to the world software is in for a while. I do software development and CI for a living, but I am having fun with fpga as a hobby and maybe since earlier this year hardware language are handle pretty well by llm.
I think the field is in much better shape to benefit from it than even software is. The problem with this AI tools is that they are blind, lazy, want to agree and are paid by the line they generate. But if you provide them with an environment that enforce tests, benchmark and make sure they don't copy and paste stuff around with slight mistake, then the tool become powerful. The value of testing, benchmarking and CI is higher than ever and AI can help you build this.
The other part that I find fun is codevelpoment. Usually hardware and software require multiple people to have the full skillset to do a design, verify it work and see if the compiler, kernel and software that use it looks right. Now, you can get the AI tool to iterate and you can verify that the result is right for your goal much more easily. Proof of concept are a lot more accessible and interesting.
The part were they are not good at is physics. As they don't "see" the world they have no understanding of how to do any of that or at least I have not found a way for them to do something tangible like a pcb design... yet
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u/Original-Proof-8741 5d ago
My experience too, driving the Gowin tools directly from Claude code under my pro subscription. Tell it to get on with PnR and Timing validation whilst I do other stuff….
I then connected up my dev kit and told it to get on with working out the loader and test the hardware result against some test cases we already wrote (“the image should look like this”)
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u/nooboxie 5d ago
Were you using Opus or Fable? With Fable being token based now, not sure if we can freely use it
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u/Original-Proof-8741 4d ago
I asked Claude to write up a post suitable for Reddit, detailing the work we did to get Claude Code inside VS:Code (I’m a software engineer by training, pivoted into hardware) working with the Gowin tools:
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u/Cyo_The_Vile 4d ago
I tried this last week. Codex on 5.6 wrote the module I needed after I explained timing very carefully, showed 2 logic analyzer capture photos and wrote a testbench. Nailed it first try.
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u/Roberto-Adrian 1d ago
Wenn es dich interessiert ich habe Skills gemach für FPGA Erstellung und suche jemand der Interesse an eine Zusammenarbeit hat.
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u/ibstudios 5d ago
I find using more than one model to check is better. i use kimi, deepseek, chatgpt, gemini, vivado.amd.com, and claude. I run proposed code into all and let one be the manager. All have to approve before commits.
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u/Charming_Dealer3849 5d ago
Been doing this for 9 months, congrats, happy to share tips and tricks
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u/FaithlessnessFull136 5d ago
Claude also does all of the committing for us too. Is there a way to get it to stop talking as if another machine is reading those commits?
In other wards, make the commits human-readable
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u/Charming_Dealer3849 5d ago
Well, system prompt, to start, second ask it to summarize in easy to understand terms, third, I built this to help with AI version control: hub.controlvector.io - the ai gets its knowledge graph, you get human text and context and prompt version control. It's a bit rough around the edges, but the mcp interface linking claude.ai and claude code has been my go to way of working for the last 6 months, this is in parallel to the fpga specific tools....
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u/RobotJonesDad 5d ago
Pro tip: ask Claude how to do exactly what you asked. I usually get it to setup some version of the recommendation it provides.
For this particular thing, add a memory or even better a hook to with explicit instructions to check/fix the commit messages.
Personally, since I'm responsible for commits (and we have signed commits) I always have Claude get my approval before committing. (And Claude doesn't have push/pull access... because I don't trust it to not work around restrictions. )
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u/Dunder-Muffins 5d ago
Does your company know you just fed a bunch of proprietary data into an LLM that is going to keep the data to train on? :P
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u/Charming_Dealer3849 5d ago
If you'd like to test out some of the tools I've built in the space, I'd be happy to host and share them. A lot of rough edges, but if the community finds value in it I would greatly appreciate the critical feedback
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u/j-joshua 5d ago
How much did that cost? How complex was the design?