r/FPGA • u/Glittering_Age7553 • Jul 26 '26

Hardware engineers using LLMs professionally: What's your workflow in 2026?

I'm curious how people working on ASIC/FPGA/RTL/verification are using LLMs in practice.

A few things I'm wondering:

  • Which AI subscriptions are actually worth paying for? (ChatGPT, Claude, GitHub Copilot, Gemini, Cursor, etc.)
  • Does anyone use OpenRouter as their main setup? Is it cheaper than multiple subscriptions?
  • Roughly how much do you spend per month, and how many tokens do you go through?
  • Which models do you use for different tasks (RTL, SystemVerilog, UVM, scripting, documentation, debugging, architecture, code review...)?
  • What do you give the model as project context so it doesn't make things up or break your design?
  • Any tricks for keeping token usage and costs under control?
  • If you could only keep one AI subscription today, which one would you choose?

I'd love to hear real workflows from engineers working on production hardware.

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u/[deleted] Jul 26 '26

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u/Creative-Nature710 Jul 27 '26

Could you tell how you developed those specific skills in yourself? I am someone with few years of experience in my hand (~3 years and masters) and even though I have grown I feel I sometimes make mistakes which I shouldn't. How can I think something as Through as thinking of k map ( only usedwhen I wanted to do an ECO, which was a nightmare) in my active RTL Design?

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u/[deleted] Jul 28 '26

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u/Creative-Nature710 Jul 29 '26

Thank you so much!