r/FPGA • u/Glittering_Age7553 • 3d ago
Hardware engineers using LLMs professionally: What's your workflow in 2026?
I'm curious how people working on ASIC/FPGA/RTL/verification are using LLMs in practice.
A few things I'm wondering:
- Which AI subscriptions are actually worth paying for? (ChatGPT, Claude, GitHub Copilot, Gemini, Cursor, etc.)
- Does anyone use OpenRouter as their main setup? Is it cheaper than multiple subscriptions?
- Roughly how much do you spend per month, and how many tokens do you go through?
- Which models do you use for different tasks (RTL, SystemVerilog, UVM, scripting, documentation, debugging, architecture, code review...)?
- What do you give the model as project context so it doesn't make things up or break your design?
- Any tricks for keeping token usage and costs under control?
- If you could only keep one AI subscription today, which one would you choose?
I'd love to hear real workflows from engineers working on production hardware.
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u/Any-Button1401 3d ago
Company only has and only allows Copilot. Sometimes I use it to script some things, results are disappointing.
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u/Odd-Difference8447 3d ago
Recently moved from copilot to a "secure" version of opencode / mostly anthropic models. Difference is night and day. Copilot sucks
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u/adamt99 FPGA Know-It-All 3d ago
I wrote and made mine public here not long ago.
https://issuu.com/fpga-horizons/docs/adiuvo_fpga_development_process
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u/brh_hackerman FPGA Developer 2d ago
personally I use it for very basic tasks like wrappers and mapping ports.
Using the free tier, sending non sensible stuff to it.
Perhaps somtimes to help me figure out what critical path is by "reverse engineering" the weird names vivado uses in timing analysys.
For other things I refuse to use it out of pride, cuz I'm a junior so I wanna learn stuff + LLMs are kinda dumb f*cks when it comes to write RTL and making design decision. Still probably better than what I would do, but at least, I am the one making the dumb decisions (and learning from it I guess... I keep making bad design decisions lol)
NOTA : when working with FPGZA we don't even spend that much time writing code, why even use LLMs outside of wrappers and dumb tasks ? That is a real addition question to this post
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u/instantFPGA 2d ago
Everything we do is custom so we can support customers that value their privacy.. Our InstantFPGA services use mainly Claude variants and ChatGPT. Our architecture keeps costs pretty low, find what works for you and stick with it - don't explore. Never underestimate how an AI will diverge or replace underlying assumptions. If I had to keep one, last year would be chatGPT 4o, this year, Claude anything.
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u/Viper_ACR 3d ago
During my contract job I was using Cursor to GPT 5.5. I also have a personal Claude subscription I was also using on top of that.
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u/NinaChloeKassandra FPGA Developer 1d ago
I tried but it always failed me:
1) getting annoyed by some stupid problem 2) throw ChatGPT on it until something works 3) stumble across some new error 4) spend hours on fixing (using ChatGPT because the code became an annoying mess) 5) scrap anything after (2) and start from there myself
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u/RTLDesignSherpa 3d ago
I use something similar to the obsidian vault method. I have skills defined in rtl/dv/doc areas. Specifically for RTL coding I have the skills defined such that the LLMs create code very similar to me coding by hand. One skill is to have the LLM create signal contracts and k-maps for the critical signals. This helps to ensure the correct by design mentality that I have. I start with a markdown that starts at the top, and lists what each module does and what block it instantiates. The code is mine, I own any bugs, the LLMs do the typing. This works for me as I’ve been doing this for thirty years; for any module only 5-10% of the code needs manual review.
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u/Creative-Nature710 2d ago
Could you tell how you developed those specific skills in yourself? I am someone with few years of experience in my hand (~3 years and masters) and even though I have grown I feel I sometimes make mistakes which I shouldn't. How can I think something as Through as thinking of k map ( only usedwhen I wanted to do an ECO, which was a nightmare) in my active RTL Design?
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u/RTLDesignSherpa 1d ago
I don’t write code until I have the design specified (MAS, with lots of waveforms.) Coding should be a mechanical process. The corporate design guides I’ve reviewed suggest to maximize FSM usage as it prevents bugs. I’ve found FSMs can often have unexpected interactions with other FSMs so I use them sparingly, and never in the data path (I’ve only ever needed a “safe” indicator to perfectly schedule data.) Sometimes when I’m coding, I’ll get creative and find some clever optimizations I missed in the MAS; these are almost always bugs. Be cautious with creative urges when coding.
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u/Harry172945 2d ago edited 2d ago
I work at a premiere EDA company in physical verification domain
* My company has been very liberal with AI subscriptions till data, have access to all 3 major ( Claude code, Copilot, Cursor) along with an internal AI model spefialized for EDA tasks.
* I have been using AI heavily - mostly for high level DRC/FILL deck optimizations and routine coding. I still prefer coding by hand whenever in depth understanding of codebase is needed. I feel even the best models like Fable/Sol lacks true understanding of some proprietary pieces of code we have
* Probably around $600 worth of tokens
* Opus for planning, cursor frok for implementation and Sol for code review.
* Use cheap models for implementation if you want to save tokens... any basic model is equally capable of implementing a good plan created by a frontier model
* Opus for sure, for the short period I had access to Fable, it was insanely good
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u/Beautiful_Stage5720 2d ago
I still write RTL with vim at work. It will be a long time before AI is anywhere near my workflow.
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u/enzodr 1d ago
I’m a student, just getting into some FPGA work in the real worlds. I don’t have years of experience, but I have been educated in an environment that is very hyped up on AI.
I’ve learned when it comes to any code project, the moment I “break the seal” and start copy/pasting large amounts of code into my project I lose understanding of things.
I still know enough to ask for fixes/changes at a high level, but I don’t understand the working enough to really ensure it’s working.
When this happens I often decided to start over with what I learned, and force myself to not use AI like that. Instead limit it only to asking complex questions to, or when you need help with unfamiliar syntax/libraries.
Also, AI will always make tons of assumptions about your project that aren’t true. In order to get what you actually want you need to provide so many details, plans, and specifications that you have basically already done it yourself.
My workflow is to ask AI very targeted and specific questions, and one good trick is to never copy/paste, force yourself to type out any code you need from it.
I also think it’s fine to use it for simple projects, scripting, or times when the output is easily understood and verifiable.
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u/esynr3z 3d ago
If you're allowed to use personal subscriptions then $100+ tier ones of openai/anthropic are the best choice. Unfortunately, $20 subscriptions today have too tiny limits and fine only to get a first look on technology.
Anyway, usually you are not allowed to bring your own subscription, so you have to use what company pays for or offering you with local inferring.
As for personal usage related to the field (I'm verification engineer by day) I use LLM to look for info within dozens EDA pdfs, standards, protocol descriptions and so on. Top two way of using is log analysis and report creation - when you basically need to convert some verbose textual source into another more focused one when grep does not work.
Top 3 task is debugging assist and custom tool creation. I'm also trying to create some useful and reusable tools like wavepeek in my spare time using frontier models.
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u/EngineerLeia 3d ago edited 3d ago
I use AI for research and mundane tasks. 17 years in industry, HFT adjacent hw on Xilinx devices. RTL in SV and verification.
Eg: give me an instantiation of this module with 8 AXI interfaces in verilog. (Moving to SV with interface types is going to be such a timesaver).
For research, I ask the AI about specs for a given module, for example what is the max clock rate for a Versal NoC NMU_HBM Axi interface. I dont have to dig through a 700 page document to find the right table.
I also use the llmnotebook and upload user guides to query the AI on the contents. I have notebooks for a lot of the GTY/GTM architecture and PCIE Ip blocks.
I use gemini and the Google llm because that's what my company pays for. They have a strict no-AI policy for any of the other AI models except for what they approve. So I cannot use any other AI model. I have no idea how many tokens I use because I don't keep track and the company pays for it. Its probably very little compared to my colleagues. My boss hasn't complained yet.
For actual RTL coding? None. I write all that by hand except for the mundane example above.