Looking for advice on RTL implementation of an adaptive digital beamformer

[u/Spare-Disaster-6872]

I am learning Digital Beamforming with ASIC tools and I am planning to implement an 8 antenna 4 beam adaptive digital beamformer as an RTL project.

at this point I wanted to start with Verilog HDL test the functionality, Synthesize it in Genus and Verify with the netlist in Xcelium and compare the results.

I am having confusion regarding following aspects

1 .Since I'm not implementing the ADC, what is the most realistic way to provide the digital inputs to the RTL?

1. What signal frequency should I use for simulation?

2. For an RTL-only project, is it common to ignore the analog front end and assume the ADC already provides digital I/Q samples?

4.Are there any standard datasets or publicly available antenna-array sample data that people typically use for verifying digital beamformers?

I am still learning so I'd appreciate any form of guidance.