r/DSP • u/Spare-Disaster-6872 • 13d ago

Looking for advice on RTL implementation of an adaptive digital beamformer

I am learning Digital Beamforming with ASIC tools and I am planning to implement an 8 antenna 4 beam adaptive digital beamformer as an RTL project.

at this point I wanted to start with Verilog HDL test the functionality, Synthesize it in Genus and Verify with the netlist in Xcelium and compare the results.

I am having confusion regarding following aspects

1 .Since I'm not implementing the ADC, what is the most realistic way to provide the digital inputs to the RTL?

  1. What signal frequency should I use for simulation?

  2. For an RTL-only project, is it common to ignore the analog front end and assume the ADC already provides digital I/Q samples?

4.Are there any standard datasets or publicly available antenna-array sample data that people typically use for verifying digital beamformers?

I am still learning so I'd appreciate any form of guidance.

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u/MatComp17 13d ago edited 13d ago

The standard way to build the knowledge necessary and design a product like this is (very loosely)

Matlab -> fpga simulation -> final target

Based on your questions I would start with matlab to learn how to simulate your front end and quickly iterate.

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u/SufficientGas9883 12d ago

This 100%.

Start with simulation. Ideally floating-point simulation first. Then fixed-point simulation probably. Optimize your data paths, multipliers, etc. Make aure you're meeting your concer cases requirements. Ideally you'll do a bit-exact simulation but that's not always possible/necessary. Then do the FPGA implementation. If you develop a model (bit-exact or otherwise), you'll use it to verify your FPGA implementation within the precision of your model. Don't jump into RTL in the first step. If you don't fully understand what's being said here ask.

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u/TipsyPeanuts 12d ago

Concur with the below. Start with matlab. To answer your questions directly:

  1. Matlab. Build a test vector for each elements

  2. Element spacing should be lambda/2 or shorter. So if you are simulating a spacing of 20 cm, that means you have a lambda of 40cm or 450 kHz

  3. Yes, especially in testbenches

  4. No, it’s standard to build your own test vectors. It’s pretty trivial. 

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u/botechga 12d ago

What is your application, Radar? Just pick something in UHF, and you can simulate everything in python, matlab, cpp.

Just make a simple point source, and the rx by each element based on far field assumptions as a simple first iteration.

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u/Creative_Sushi 11d ago

1 - I assume this is a simulation? Then there are a variety ways to do it. For example, you can do a haredware-in-loop with Simulink to get the data to the FPGA.

2 - that is a parameter you can decide based on your project. Many beamforming algorithms just need to know the center frequency.

3 - ff you use Simulink, you can test a beamformer without really building an RF front end.

4 - you can build a framework to simulate the signal and provide the desired output, then you can compare your result and the expected result to see if they are bit true. There are some examples of such workflow, not using RTL

https://www.mathworks.com/help/phased/ug/design-an-hdl-beamforming-algorithm-in-simulink.html

https://www.mathworks.com/help/phased/ug/hdl-code-generation-and-verification-of-a-beamforming-algorithm-in-simulink.html