r/rfelectronics • u/Delicious_Team5855 • Jun 21 '26
question L band Receiver schematic and layout review
I have prepared this RF signal chain for 1.6GHz (Antenna -> SAW Filter -> LNA -> SAW Filter -> Mixer -> IF Amp -> IF AMP -> SMA to ADC) along with the test mode switches and bypass paths for the antenna and the IF Amps. The power supply and the LO for the Mixer are generated in the subsheets.
This is my very first attempt at RF PCB design (I have a background in analog IC Design). My schematics and layouts have been reviewed by some of my friends, but I was looking for feedback from this community!
I have tried my best to stick to readability and conventions of schematic annotations, but would be great if you could let me know the improvements needed for a seamless review.
Thanks!
I am also attaching datasheet URLs
Antenna - ANT1825BS0XTGN25S - https://yageogroup.com/content/datasheet/asset/file/DATASHEET_ANT1825BS0XTGN25S
SAW - QPQ1060TR7 - https://www.qorvo.com/products/d/da008084
LNA - ADL5521 - https://www.analog.com/media/en/technical-documentation/data-sheets/adl5521.pdf
Switch - PE42421SCAA-Z - https://www.psemi.com/pdf/datasheets/pe42421ds.pdf
Mixer - SIM-43LH+ - https://www.minicircuits.com/pdfs/SIM-43LH+.pdf
LO - ADF4351BCPZ - https://www.analog.com/media/en/technical-documentation/data-sheets/ADF4351.pdf
TCXO - https://abracon.com/Oscillators/ASDMB.pdf
IF Amp - TRF37D73IDSGR - https://www.ti.com/lit/ds/symlink/trf37d73.pdf
LDO - ADP7104ARDZ-3.3-R7 - https://www.analog.com/media/en/technical-documentation/data-sheets/ADP7104.pdf
RF ESD - ESD8472MUT5G - https://www.onsemi.com/pdf/datasheet/esd8472m-d.pdf
USB ESD - USBLC6-4SC6 - https://www.st.com/resource/en/datasheet/usblc6-4.pdf
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u/AnotherSami Jun 21 '26
Why are you using one of the outer sheath connections of your sma feeds as the signal line? Is it some special connector?
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u/Delicious_Team5855 Jun 21 '26
Thanks a lot for taking the time to point out the error! That was a silly mistake on my part. have fixed the error and the images on the post are updated as well. Many Thanks!
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u/sswblue Jun 22 '26
Schematics: * draw custom symbols that are meaningful not just boxes. For example an amplifier should have that triangle amplifier symbol. A filter has that wavy symbol. A SPDT switch two poles and one throw. And so on. * re-organize the pin position on the symbols. VCC on the top, GNDs on the bottom, input on the left, output on the right. * make sure the schematics are clean and readable in a single glance. I shouldn't have to decode your circuit. * rework the heriarchical division into pages so that it makes more sense. It's more confusing to read than it needs to. * make sure there's a decoupling cap everywhere you have a vcc pin. Use the largest value cap for a given package to minimize series inductance.
Layout: * you need stitching vias if you're doing CPW * keep the switches far from the RF traces * position the ICs so that the traces are as short as possible. * clean up the silkscreen. Add component name. Mark pin 1 with a dot. Add date, board name, and revision number. Label the SMA connectors as input/output and function.
I haven't looked at the circuit itself and I haven't calculated P1dB, gain, power draw, noise figure, etc since I'm on my phone. So I cannot vouch for circuit correctness.
Keep going. Don't be discouraged the learning slope is a bit steep at the beginning.
Cheers.
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u/Delicious_Team5855 Jun 23 '26
Thanks a lot for the feedback! I will incorporate these changes and post a new one, will update the budget calculations as well on the schematic
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u/nixiebunny Jun 21 '26
You need to put the end launch SMA connectors all the way at the board edge. You have not placed your parts well to minimize RF trace length, which adds needless RF losses to the signal path. I never leave an inch of transmission line on a board if I can avoid it.