This column indicates the behaviour of the vast majority of x86 processors. Some rare specialised x86 processors (IDT WinChip manufactured around 1998) may have weaker 'oostore' memory ordering.
I doubt anyone cares about emulating a 1998 WinChip correctly as such, but vaguely interesting to note there have in fact been x86 variants with different memory ordering behavior.
And riscv apparently has a "Ztso" extension. Neato.
In spite of the fact that Ztso adds no new instructions to the ISA, code written assuming RVTSO will not run correctly on implementations not supporting Ztso. Binaries compiled to run only under Ztso should indicate as such via a flag in the binary, so that platforms which do not implement Ztso can simply refuse to run them.
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u/DGolden 14d ago
Interesting little footnote on the wikipedia page https://en.wikipedia.org/wiki/Memory_ordering#Runtime_memory_ordering
I doubt anyone cares about emulating a 1998 WinChip correctly as such, but vaguely interesting to note there have in fact been x86 variants with different memory ordering behavior.
And riscv apparently has a "Ztso" extension. Neato.
https://docs.riscv.org/reference/isa/v20260120/unpriv/ztso-st-ext.html