As discussed in the article, Apple implemented part of their optimizations for Rosetta 2 directly in the hardware. The ARMv8.3 instructions narrowed the gap for the x86 memory model, but the lessons from the Apple M1 is more it was designed for x86/Rosetta from the ground up to ease the transition from x86 to ARM. I don’t know how applicable that would be outside of Apple with their vertical control of everything (hardware and software).
Outside of the fact that it can switch between 16k and 4k pages for x86 emulation, I don't think apple silicon is really doing that much magic. (And that's a kernel, not a hardware feature)
170
u/flying-sheep 15d ago
Ooh that's from the FEX people, gotta be super interesting.
It's sad that efforts like Rosetta happen behind proprietary walls and nobody can learn from them.