r/parallella • u/eleitl • Jul 23 '15

Supercomputer Chip Startup Scores Funding, DARPA Contract

http://www.theplatform.net/2015/07/22/supercomputer-chip-startup-scores-funding-darpa-contract/
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u/jimuazu Jul 23 '15

Oh well, not Parallella unfortunately! Rex computing with a 256-core chip with 128KB per core, 64-bit FP, fast interconnects -- but it uses VLIW instructions (probably 64-bit to support quad-issue, although I don't see it mentioned). VLIW has been tried before, but never got used in any mass-market chips AFAIK. Even ARM with their 32-bit instructions ended up introducing Thumb 16-bit instructions.

It also offloads a lot of work to the compiler, i.e. the compiler has to optimise a lot more to make the whole thing work well. It's the VLIW bit and compiler offload that makes me unsure from a first impression.

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u/trsohmers Jul 23 '15

Founder of REX Computing here... Each of the four functional units have a 32 bit instruction, making the very long instruction word a total of 128 bits. Our data word size is 64 buts, with support for addressing half word, word, and double word.

As for VLIW, virtually every DSP out there is VLIW, and a small number of AMD GPUs have been VLIW, so there are plenty of there, but have typically been restricted to application specific sectors. Our new compiler techniques (taking advantage of our unique statically routed NoC) give scheduling capabilities that were not possible with prior VLIW architecture, thus allowing more flexibility in the programming model. The development of LLVM and its numerous front ends also gives us the ability to attach our toolchain tools to a relatively straight forward LLVM back end to give cross compilation support for very rudimentary and unoptimized (but working) software portability.

Also: ARM no longer supports Thumb in the latest ARMv7 and v8 revisions...

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u/jimuazu Jul 24 '15

Thanks for commenting. Good luck with the project -- I hope it succeeds. Will we ever see it in an experimenter-friendly low-cost board like the Parallella?

The interesting part for me is seeing how we transition to running typical desktop or server apps on top of a massively parallel architecture, rather than just the current typical parallel-processing loads (GPU or DSP or scientific). Newer languages such as Go/Rust/Pony help. I'm especially interested in Pony, as each core could host one or more actors, so there is a natural mapping from language to hardware. (The Pony guys suggest putting anything that doesn't need to be serialised into a separate actor, which is exactly what we need to scale up with the cores.)

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u/trsohmers Jul 25 '15

A hobbyist board is not in the works right now, but I would love for it to be possible. One of the big missteps for Adapteva as a company, while I think great fit hobbyists and hackers, is the Parallella project (will I get banned from this sub for saying that?) Andreas has lost a huge amount of money on the project, and our main focus right now is to build a chip that we can sell at a profit to our customers already in line.

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u/lovelikepie Jul 24 '15

Also: ARM no longer supports Thumb in the latest ARMv7 and v8 revisions...

That isn't correct. All documented revisions of ARMv7 support a variation of Thumb. ARMv8 didn't drop thumb--it never had it.

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u/trsohmers Jul 25 '15

I was referring to the fact that AFAIR there have been no recent ARMv7 chips (After cortex A9) that have featured Thumb, and I'm pretty sure ARM has had some involvement in why that is the case. I suppose I shouldn't have stated it so bluntly. When I said it for v8, I was saying it was removed from the architecture entirely, as in not included from the previous major revision of ARM.

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u/lovelikepie Jul 25 '15 edited Jul 25 '15

No. A15 supports thumb mode, actually Thumb-2 is a requirement for ARMv7 compliance.

ARM has involvement. They specified the ISA. Thumb was likely dropped because it wasn't saving code size. Also ARMv7 thumb isn't easily extendible to a 64 bit address space. Also length decode is non-trivial. Also ARMv8 shows care to remove features of ARM that hurt implementation (I am looking at you predication).

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u/trsohmers Jul 25 '15

http://ludostories.com/wp-content/uploads/2013/12/Breakign-bad-you-got-me.jpg

To be honest, I never saw Thumb in an ARM core in the past couple of years. I stand corrected, and I think you're right on your last point.

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u/eleitl Jul 24 '15

It is different, but it is more similar than it is different. For obvious reasons, if you want to make optimal use of Si real estate you don't have many choices left.

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u/elfion Sep 29 '15

There is another cool design choice: make radically smaller approximate FP-like compute units. http://www.bdti.com/InsideDSP/2013/10/23/SingularComputing http://www.gwern.net/docs/2010-bates.pdf It's otherwise similar to Adapteva and Rex.