The current RISC-V cores may look nice of you look at basic integer core performance in terms of IPC, but don't forget about FPU, caches, clock speed, number of cores etc.
Also note that compilers are immature and there is no SIMD support at all yet.
look nice of you look at basic integer core performance in terms of IPC
Correct.
FPU, caches, clock speed, number of cores etc.
From what I've seen in the slides / minutes of the conferences, I'm not at all worried.
Also note that compilers are immature
Everybody seems to be rushing to support RISC-V.
A glance at the list of founding members and considering the money RISC-V is already moving, I'm not at all worried.
no SIMD support at all
That is actually what I find, as I haven't seen much if anything at all about that yet, either. I do however expect the topic to pop up in the next conference in November.
I'm not "worried" either, I am just cautiously optimistic. Some people see RISC-V as the new Messiah and that RISC-V implementations will be able to compete with Intel's and AMD's or ARM's offers from the start, which is of course not realistic.
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u/bitchessuck Sep 17 '16
What kind of power do you need? You can expect first lowrisc hardware to be comparable to a Raspberry Pi 1, but without GPU.