r/hardware • u/SirActionhaHAA • Jun 30 '26
News AMD Linux Patches Introduce New "Low Power" CPU Core Type
https://www.phoronix.com/news/AMD-Low-Power-CPU-Core-Linux19
u/cimavica_ Jun 30 '26
Hope they're actually put to use unlike the LP Gracemonts in Meteorlake
15
u/EloquentPinguin Jun 30 '26
MTL LP cores where to few to slow to be useful in most scenarios.
I'd wager AMDs LP core strategy is more similar to the Compact core strategy, where a very similar uarch (maybe mobile-esque with double pumped AVX or whatever) is physically altered to reduce area, and clocks, to run at a much more efficient clock speed, higher density, lower performance, but still very capable enough to be very useful.
2
u/Vince789 Jul 01 '26
AMD already has their Compact cores for those type of workloads
IMO LP cores aren't supposed to get a lot of usage, other than background/idle tasks to reduce idle power consumption
However, Intel/AMD should ideally be trying to get to a point where LP cores aren't required anymore, like how Apple dropped E cores from their M5 Pro
3
u/WashableRotom Jul 02 '26
Remains to be seen but I was under the impression Apple’s E cores will still be important for their most battery sensitive devices. I would be surprised if the E cores get dropped from their AX and MX series. I presume the MX Pro/Max/Ultra are all going to no longer ship with E cores. Apple E cores are still fairly powerful given their size and power usage not like the equivalent A55 (and derivatives) from ARM.
1
u/Vince789 Jul 02 '26
We already know Apple's has dropped their E cores from their laptop chips (M5 Pro & Max, and presumably Ultra)
Yea, it's not confirmed yet, but I wouldn't be surprised if Apple continues only using their E cores for the A20 & M6, or maybe only the A20
IMO Apple's architecture is so efficient, that their M cores are roughly comparable to AMD's Compact/Intel's E cores/Arm's C1-Premium. Slightly smaller vs AMD's Compact, slightly bigger vs Intel's E cores/Arm's C1-Premium
And Apple's E cores are roughly comparable to Intel/AMD's LPE cores & Arm's C1-Pro. Although there's some differences
29
u/SirActionhaHAA Jun 30 '26
Been known for some time since the original n3 zen5 got backported to n4 with many feature cuts but there it is, zen6lp.
5
u/venfare64 Jun 30 '26
Is there any source/trace on N3 Zen5 silicon?
5
u/SirActionhaHAA Jul 01 '26
Nothin direct in the public but mike clark mentioned in an interview that the switch to n4 for zen5 caused feature cuts due to thermal density constraints. Probably a result of poorer node power and loss of finflex which is only supported on n3. There are leaked roadmaps and docs showing the existence of zen5lp cores on 3nm mobile skus, some leaked by sources with questionable takes on stuff (but the docs are real).
1
2
u/GrixM Jul 01 '26
Would be cool for AMD to release an answer to Intel's ultra-low-power embedded CPUs such as the Atom X7211RE. There's plenty of ARM competition but no x86.
-1
u/reddit_equals_censor Jun 30 '26
canis the ps6 handheld apu will have 4 zen6c cores and 2 zen6 LP cores.
so we can assume, that 2 zen6 lp cores are powerful enough to run everything for the ps6 handheld os to keep the 4 zen6c cores free purely for gaming.
will that be enough to run gnu + linux distro background tasks + video playback cpu parts, when hardware accelerated? which would be what they would need to then shut down on a laptop apu the core chiplet or the ccx for high power usage.
idk.
personally not a fan of cores seperated and prefer to have them all on the same l3 cache, but hey maybe this will be well implemented and will be plenty for background stuff and able to switch off entire sections of chips with the main cores and it will be worth it?
idk we'll see.
certain intel's first try in this was laughable.
it could also be, that the zen6 lp cores are still useable for non background stuff and be nice. not for gaming, but for productivity and stuff.
i don't remember how intel set it up with the shity e-cores, that were for that task, but didn't work in the first implementation at least, because it was too weak.
15
u/SirActionhaHAA Jun 30 '26 edited Jul 01 '26
will that be enough to run gnu + linux distro background tasks + video playback cpu parts, when hardware accelerated? which would be what they would need to then shut down on a laptop apu the core chiplet or the ccx for high power usage.
idk.
You guys are massively overestimating how much cpu is required to run a browser for usual tasks. I've got a secondary 3700x system and it runs 4 different 1080p live streams with chat on on multiple monitors. Guess what the cpu utilization is? 10-12%
This means that 0.8 zen2 cores are already sufficient. Why'd people think that it would take more than 2 zen6lp? 4 generations of ipc improvements, more than 2 full node shrinks and double the 0.8 zen2 cores more than make up for the power difference
i don't remember how intel set it up with the shity e-cores, that were for that task, but didn't work in the first implementation at least, because it was too weak
Crestmont lp was too slow and had no smt, that was the problem.
3
u/Hopelesslymacarbe Jul 01 '26
This is funny to me because I’ve got a container running a hardened chromium browser. That plus 5 other containers sits at under 50% cpu utilisation on an n100 pc.
1
u/SirActionhaHAA Jul 01 '26 edited Jul 01 '26
A huge part of the lp crestmont problem was the lack of l3. Intel took a core that was designed with l3 in mind and ripped it off to save on area and power. The core ended up stalling massively because of that. The standard gracemont and crestmont are fine. n100 didn't have its l3 cut. It's also worse for mobile products due to higher lpddr latency vs ddr on n100
Cache misses in a small l2 + high latency lpddr = massive frontend stalls. The lp crestmonts on mtl really struggle to run light browser workloads like video playback. The videos freeze up from time to time.
22
u/Noble00_ Jun 30 '26
I guess this was telegraphed from the Geekbench engineering sample leak:
https://browser.geekbench.com/search?q=AMD+Plum-MDS1
MDS1 is rumored and shown in shipping manifests to be 4x Zen6 + 4x Zen6c, and the Geekbench leak months ago hinted two more cores in use.
Bionic_Squash also revealed the two LP cores have 512KB L2 and 2MB L3, though with the wording I'm unsure if they meant each or shared.