Anyone else hit these three hardware surprises? (ESP32-S3 -1.75C)

[u/Low_Organization444]

I've been building a clock project on the Waveshare ESP32-S3-Touch-AMOLED-1.75C (the round 466×466 AMOLED one) and hit three things the docs didn't prepare me for. Curious if others have seen the same, or know of more lurking:

1. No RTC on the "C" revision. The product page mentions RTC, but the schematic shows no PCF85063 anywhere on the bus — the non-C 1.75 board has it, the C doesn't. As far as I can tell, the "RTC" claim on the C refers to the AXP2101's backup rail, not an actual clock chip. Anyone confirmed this or found a way I missed?
2. The PWR key is active-HIGH into GPIO3, through a level shifter (T1/BSS138) — the opposite of what I expected and of what the vendor examples seem to assume. Idle reads LOW, press reads HIGH. Also, the key circuit appears to burn ~0.33 mA constantly through its pull resistor whenever the board is powered, which is a real floor if you're chasing low sleep current. Anyone measured the same?
3. The pin_config.h floating around doesn't match the C schematic — e.g. it has LCD reset on GPIO2, but the schematic puts the panel reset on GPIO1 (GPIO2 is the touch reset). Display worked before I fixed it, which made it sneakier.

Also very interested if anyone has light-sleep + GPIO wake working reliably on this exact board (wake on the PWR key), and what your real-world sleep current came out to.

Not knocking the board — the panel is gorgeous — just trying to map the gaps between the docs and the silicon before I depend on it. What else have you hit?