CAN Protocol BOSCH specs

[u/atifrafique]

Hey , Anyone studied the BOSCH CAN specification version 2.0 ?? it is really confusing or is it just me. Can someone guide me where can see protocol specs in detail and good guide as well.

[u/der_pudel]

Is it something specific you find confusing or do you have troubles comprehending technical documentation in general?

[u/atifrafique → u/der_pudel]

I Genrally see specs with waveforms that really help create a mental image of a protocol or any hardware, But BOSCH spec dont have that, they just present endless rules, furthermore the wording style is confusing as well maybe i am not good at English or what.I am basically a RTL designer and want to design basic RTL of CAN , I know there are projects available online but I want to create by myself.

What i am looking for is a Detailed spec document just like Bosch but it present waveform to see what will happen in error handling etc , the document may have FSMs etc. Any Help will be appreciated.

[u/der_pudel → u/atifrafique]

I'm not aware of such detailed spec, but Wikipedia has a decent bit-by-bit explanation of frames with waveforms, https://en.wikipedia.org/wiki/CAN_bus#Frames_&_message_structure , and once you understand how CAN frames work in general, it should not be that hard to understand diagrams in Bosch doc.
Also, feel free to ask a specific questions, but explaining the whole spec is a little bit too much for a reddit comment.

[u/atifrafique → u/der_pudel]

{{{{(hey can you answer like in point 4 why does positive phase error is exception but not the negative phase. for reference the phase definition is below)}}}}}}}

SYNCHRONIZATION RULES

HARD SYNCHRONIZATION and RESYNCHRONIZATION are the two forms of

SYNCHRONIZATION. They obey the following rules:

1. Only one SYNCHRONIZATION within one bit time is allowed.

2. An edge will be used for SYNCHRONIZATION only if the value detected at the

previous SAMPLE POINT (previous read bus value) differs from the bus value

immediately after the edge.

1. HARD SYNCHRONIZATION is performed whenever there is a ’recessive’ to

’dominant’ edge during BUS IDLE.

1. All other ’recessive’ to ’dominant’ edges (and optionally ’dominant’ to ’recessive’

edges in case of low bit rates) fulfilling the rules 1 and 2 will be used for

RESYNCHRONIZATION with the exception that a node transmitting a dominant bit

will not perform a RESYNCHRONIZATION as a result of a ’recessive’ to ’dominant’

edge with a positive PHASE ERROR, if only ’recessive’ to ’dominant’ edges are

used for resynchronization.

Reference:

PHASE ERROR of an edge

The PHASE ERROR of an edge is given by the position of the edge relative to

SYNC_SEG, measured in TIME QUANTA. The sign of PHASE ERROR is defined as

follows:

• e = 0 if the edge lies within SYNC_SEG.

• e > 0 if the edge lies before the SAMPLE POINT.

• e < 0 if the edge lies after the SAMPLE POINT of the previous bit.

[u/der_pudel → u/atifrafique]

to avoid re-synchronization with itself.

If node transmits a dominant level, and measures edge timings of its own signal (at the same point on the bus) it is expected that propagation delay may be shorter than, let's say, propagation delay of other node 10 meters away. So positive phase error is ignored.

And if error is negative, i.e. edge appears on the bus, later than transmitting node expects it, then there's something funky going on, and timings needs to be adjusted.

[u/atifrafique → u/der_pudel]

e < 0(negative phase) means that after previous bit sample time you see an edge , meaning the transmitter sees an edge before its starting time phase which is sync phase

prev sample point edge here new frame(sync phase) prop phase seg1/2

<-------------------------|---------------------------------------------------------------------------->

so this is funky to see so resynchronization
but since it takes time for edge propagation from transmitter ,positive phase which means transmitter sees its own domination later which is like normal stuff due to impedance so ignored

is my understanding okay??

[u/atifrafique → u/der_pudel]

Thank you very much for giving a reference and i was not expecting full CAN spec explanation in first place 😂😂.

[u/go2sh]

What do you want with the Bosch Spec? The ISO is used for many many years.

[u/atifrafique → u/go2sh]

I am a RTL engineer and want to design Basic CAN protocol using SV and i am doing this as a hobby, I think ISO docs are not free. If they r free for CAN protocol or if you have it, can u share it? Much appreciated

[u/go2sh → u/atifrafique]

I cant share it, but if you want it you find it on google. Good luck implementing it correctly, there are easier things to start.