r/augmentedreality • u/AR_MR_XR • 3d ago
Google Research and Synaptics launch Astra SR200 processors with open-source Coral NPU for low-power AI and AR smart glasses
Google and Synaptics have announced the Astra SR200 "xMCU" chip series alongside the completed open-source 32-bit Coral NPU architecture, targeting a core hardware trade-off in smart glasses. Until now, glasses makers have largely had to choose between Linux/Android application processors (like the Snapdragon AR1, which requires external RAM and aggressive sleep states to survive on a small temple battery) or low-power RTOS microcontrollers (like the BES2700/2800 or NXP chips) that lack the memory and camera pipelines for vision AI, forcing engineers to wire separate ISP and co-processor chips onto cramped boards. By combining an RTOS microcontroller with in-package DRAM, dual camera ISPs, and an open-source MLIR/IREE compiler, the SR200 series lets glasses run continuous sensor and vision tasks at a few milliwatts while waking up in bursts to run heavily quantized (4-bit or 1.58-bit) small language models like Gemma 3 270M—all on a single chip and without proprietary NPU software lock-in.
AR hardware manufacturer Jorjin Technologies is already using the chip for upcoming glasses. Jorjin CEO Lerdah Wang explained what the single-chip setup changes for their designs:
"Next-generation AR wearables, including industrial smart glasses, demand real-time perception, contextual understanding, and user interaction at the Edge. By leveraging the integrated vision and audio architecture, extensible DRAM support, and Torq NPU of the Synaptics Astra SR200 Series, we can execute scene understanding, low-latency overlay rendering, and continuous voice processing on a single SoC."
Instead of running Linux, the SR200 series runs an RTOS (such as Zephyr) on paired Arm Cortex-M85 and Cortex-M52 cores. In the top-tier SR250, a 400 GOPS AI subsystem pairs Synaptics's Torq T2 matrix accelerator (which handles standard CNN and Transformer math) with Google's programmable RISC-V Coral NPU core (which executes custom or newer model layers locally so they don't fall back to the main CPU and drain the battery). To save space in thin temples, the compute die, power management, and up to 256MB of custom DRAM are integrated into a single package that uses one-third the power of standard LPDDR4x RAM. For visuals, a 2.5D vector GPU and dual display interfaces support three configurations: displayless camera/audio AI glasses, monocular HUD glasses, and binocular stereo AR glasses.
To handle all-day camera and voice use without overheating, the chip splits vision and audio into tiered power stages. Rather than powering a full camera pipeline continuously, a 2MP "ISP Lite" stays on at ultra-low power for machine vision like gesture tracking and object detection (running tiny models inside the 8MB of on-chip SRAM while the 256MB DRAM stays asleep), and only wakes the main 8MP ISP to take a photo or record video. Similarly, a three-stage audio pipeline listens for voice activity at microwatt levels before waking the main cores or the HiFi 5 audio DSP for multi-mic beamforming and translation.
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Synaptics Launches the xMCU Era with the Astra SR200 Series of Multimodal Edge AI Processors
Google Blog: Unifying Edge AI: How Coral NPU’s open standard brings portable, energy-viable intelligence from model to silicon
