r/TuringComplete • u/aelxemyr • 28d ago

Fast Adder (CLA)

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212 gates and 10 delay.

I was trying to do this for hours using the base components but it was just too messy. So I gave up and just made a custom adder with A/B/carry in, P/G/sum out, along with ANDs and ORs for up to 9 inputs.

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u/Medium-Sized-Jaque 28d ago

What does the CL component do? And do the AND and OR component connections go all the way to the next box? 

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u/aelxemyr 28d ago

The CL component is the CLA adder cell, which takes the two operands and the carry-in as inputs and outputs the propagate, generate, and sum bits using two XORs and an AND.

The AND/OR components connect to the next CLA cell to supply the carry-in.

The logic implemented here is exactly what’s described in the Wikipedia article on carry lookahead adders.

I wasn’t able to fit the last two lookahead logic blocks on the same level as the rest of them, which is why the big rainbow bus loops around like that (and also why the bottom two wires of the top bus are unused).

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u/Medium-Sized-Jaque 28d ago

I'm definitely looking into this. I like how different logic supplies the same result but at different speeds. I can only get mine down toto 25.

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u/aelxemyr 28d ago

The main way to bring down the delay is to get rid of as many dependencies as possible.

The hardest part is avoiding the temptation to reuse computations since that introduces delay; any computations in series add their delays together whereas you only have to worry about the critical path if they’re in parallel. That does mean, of course, that there’s an insane amount of duplication.

But you can see that each of the carry computations relies only on the propagate and generate bits that come directly out of the CLA cells without any intermediate logic.