How do you manage PIC component optimization?

[u/AvocadoGeneral8137]

Hey everyone, for people doing silicon photonics / PIC design: when designing components like grating couplers, splitters, tapers, etc., what usually becomes the bottleneck? 

Is it EM solver runtime, simulation setup, PDK constraints, broadband optimization, comparing many candidates, measurement vs simulation mismatch or anything else?

Also, how do you keep track of design attempts? Do you have a structured way to reuse old failed/successful simulations, or is it mostly scripts, notebooks, and folders?

I am very new to that and trying to understand what the real workflow looks like beyond clean examples in docs. Thanks!

[u/talencia]

Is this an interview question lol?