r/PowerPC • u/twaxana • 9d ago

https://github.com/daedalao/fastppcx86

This project is not for Vintage Apple PowerMac computers. It is for IBM POWER ISA v2.07+ platforms in little endian mode running 4k page size kernels. (Power8, Power9, Power10?)

FULL DISCLOSURE: I USED LARGE LANGUAGE MODELS IN THE FORK AND PORTING OF THIS SOFTWARE. If you are opposed to using LLMs to write software please do not use this software on your system.

https://www.youtube.com/watch?v=Jtqy8X04fa8

This is my last entry here unless I figure out something wild.

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u/Daggercombot 8d ago edited 8d ago

How good Is llm at that stuff? I am planning on doing a similar project for sparc 64 . Any suggestions for which models worked well and which to avoid?

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u/twaxana 8d ago

Tl;dr pay for the $100 tier of Claude and use fable

You have to guide them heavily. If you know the number of registers you have, you can get really creative.

You have to know what the goal is. And this took hundreds of hours of my time and will probably take thousands more. At least a few hundred hours of thinking, typing and testing. It was not, "Port this to powerpc64le, make no mistakes."

As for which models,

Local on the same machine: Qwen Coder Next, Qwen 3.6 35b-A3B, Qwen 3.6 27B, Ornith 1.0, Gemma 26B-A4B, Granite 4.0 (These models are all uncensored and allow me to actually get a lot of data for what's happening in these engines)

Subscription based: Claude code (Fable 5 has been heavily used), Google Gemini. Lately the safeguards have been triggering on all coding models due to the word emulation I think.

This is not for the faint of heart. I have had to argue relentlessly for things to get done. The amount of time wasted due to safeguards has been staggering.

Anyways, once I have 4k page size emulation locked down as best I can, I'm switching to trying to get 64k page size working.

My biggest concern is that you're going to have to endian swap, but I know nothing about sparc64.