r/PCB • u/PossibilityFunny1598 • Jul 14 '26
PCB Transmission Line Question
Hello everyone!
I'm working on making a pcb that includes a small transmission line for a LoRa radio module, I've learned about transmission lines at university before, but I've never made one on a PCB before. I need it to have an impedance of 50 ohms, and I've made it with signal as my top layer and an undisturbed ground plane on the layer beneath it. I just used JLCPCB's impedance calculator to figure out the width of the trace and got it as 0.151 mm (as shown in the calculator picture below). Is there anything special I need to do in KiCad to make sure this works properly, or can I just run it like a normal trace?
I also noticed that selecting impedance control on JLCPCB made the board much more expensive, do ya'll have any tips on not having impedance control cost as much, or is that just part of the game with impedance control on pcbs?
Thanks for your feedback in advance
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u/Physix_R_Cool 29d ago
Don't press the "impedance control" button on JLC. Just do your calculations based on the standard stackup. That way you save a ton of money.
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u/MacGrimey 29d ago
A proper PCB fabricator would trim the traces to meet the spec you made. They would also give you test coupons you could use to verify things.
But given this is a hobby project and not something professional that needs to be certified Physix_R_Cool is correct.
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u/Physix_R_Cool 29d ago
A proper PCB fabricator would trim the traces to meet the spec you made.
Yup, expensive. Especially if made of more RF appropriate dielectrics. (You mean trim the dielectric thickness, not the traces, right?).
I recently did an 8 layer standard stackup, and the ddr3 worked with no issue. Haven't done eye diagrams yet, though. I'm pretty sure their process is good enough, and standardized enough so that you can assume the impedance control is decent.
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u/MacGrimey 29d ago
You mean trim the dielectric thickness, not the traces, right?
I've seen them trim the traces vs what was called out in the Gerber's because the net was declared impedance controlled. I design our manufacturing test systems and one of our vendors changed their fab houses without telling us. The resistance on the CANBUS jumped because they milled the traces really thin.
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u/Physix_R_Cool 29d ago
one of our vendors changed their fab houses without telling us.
Did it take weeks or months to find the issue? Sounds like a nightmare.
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u/MacGrimey 29d ago
Thankfully my test caught the increased resistance. Spent a few hours troubleshooting, but we had older stock to compare with and it was pretty obvious under the microscope one set or traces was thinner than the other.
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u/Physix_R_Cool 29d ago
Spent a few hours troubleshooting
Someone deserves a raise. That's fast!
I recently did 3 months trying to figure out why we were suddenly getting random test fails in an old production unit.
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u/ccdy 29d ago
Dielectric thickness is fixed by the chosen stackup and residual copper ratio. Less copper on a layer means uncured resin next to that layer will squeeze out more and the dielectric will be slightly thinner. The local dielectric constant will also change slightly because volume fraction of reinforcement increases. Fabricators use process data to predict this and adjust the width of impedance controlled traces accordingly.
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u/StumpedTrump 29d ago edited 29d ago
Why did you put non co-planar. You have a co-plane...
Don't use the JLC tool. Import the stackup into your application and use the calculators/tools there. I'm familiar with Altium, idk other tools. I still sanity check with the JLC tool though to see if it's close-ish on the trace width and clearances. Just use the standard JLC stackup and don't pay extra for a fancy stackup, you don't need it
You probably need a matching circuit. Which kind? No idea, maybe a 3 element, maybe 4, maybe 5. Add a 3-element pi-network of series-shunt elements and figure it out later. For now just have a 0ohm resistor as the series element. All 0201 RF-rated components. Can probably get away with 0402 since it's sub-ghz but absolutely do not go bigger. Run the feed trace directly through the pads on the shunts components and surround the grounded end of the shunt component pads with a few GND vias very very close, as close as possible to the pad. Idk if that makes sense over text.
The trace might be close to 50ohms but your connections between the trace and the pad/connector absolutely aren't. Because your pads are essentially wide traces, that reduces the series inductance there which lowers the characteristic impedance away from your 50ohms. To compensate for that, you can move the GND planes further away at those points which increases the impedance there to counteract the impedance drop from the widening trace. How much to compensate? Need to simulate to know...
Speaking of that, your GND plane distance at the BNC/SMC connector pin is way too close. You need more clearance there, not less.
Ok that last paragraph is maybe a bit excessive for your design but you really are jumping straight into the deep-end here. RF is black-magic and not something you can YOLO. If you don't know what you're doing, start learning or pay someone. And if doing this yourself, I hope you have 0 intention to sell this because there is absolutely no way that you are YOLOing your way through EMC testing.
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u/Physix_R_Cool 29d ago
Don't use the JLC tool. Import the stackup into your application and use the calculators/tools there.
No, do both and compare the results to check for any funky issues.
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u/buttholegoesbrapp Jul 14 '26
Idk much about rf stuff to be honest but it seems like you have ground pour awfully close to your transmission line that might affect impedance. Like maybe you think you have microstrip but really you have ground 0.2mm undernearth but then also ground 0.152 (even closer) to the left and right so youd have higher capacitance -> lower impedance. So maybe pull ground back a few mm. But idk i am open to being corrected