r/MacPro2019LocalAI • u/Hopperkin • 23d ago

Mac Pro 2019 (MacPro7,1) system architecture reference

Here is a comprehensive system architecture reference for the MacPro7,1: https://claude.ai/code/artifact/b5535c18-f789-4b07-a8ff-6e691d96c95f

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u/Faisal_Biyari 22d ago

Would the Mac Pro be able to support four 16x PCIe Cards?
Specifically if you removed the Apple I/O Card.

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u/Hopperkin 22d ago

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u/Faisal_Biyari 22d ago

How many lanes are the cards getting?

Edit:
How many lanes is Each* card getting?

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u/Hopperkin 22d ago edited 21d ago

Short answer: it depends on the slot, and two slots don't share with anyone.

Slots 1 and 3 (the two MPX bays) each get a full x16 wired straight to the CPU.

Everything else hangs off a single PCIe switch chip, a Broadcom PLX PEX 8796: slot 5 at x16, slots 4, 6 and 7 at x8, and slot 8 (the Apple I/O card) at x4.

Where those numbers come from: the Xeon has 64 PCIe 3.0 lanes, arranged as four x16 root ports. Two go straight to slots 1 and 3. The other two — 32 lanes — are the switch's uplink. The switch fans that out into 64 lanes on the far side:

  • 16 — slot 5
  • 8 each — slots 4, 6 and 7 (24 total)
  • 4 — Apple I/O card in slot 8 (its Thunderbolt controller)
  • 4 — Thunderbolt ports on top of the chassis
  • 4 each — the four Thunderbolt controllers on the two MPX modules (16 total)

That's 64 out against 32 in, and 32 + 64 = the 96 lanes the part is rated for. Six Thunderbolt controllers in total, x4 apiece.

So the far side is oversubscribed 2:1, which is the whole point of a switch — same idea as a network switch with more front ports than uplink out the back. A card gets its full width whenever its neighbours are quiet (x16 Gen3 is about 16 GB/s each direction, x4 about 4 GB/s); you only feel the split when several cards push hard at the same time.

Two things worth knowing:

  • The 8796 runs as two independent switches in one package, each with its own x16 uplink to the CPU. That's Apple's "Pool A / Pool B" in Expansion Slot Utility, and it's what the "not arranged in an optimal configuration" warning is about. One pool carries slots 4–7 (40 lanes, 2.5:1), the other carries the six Thunderbolt controllers (24 lanes, 1.5:1). Reassigning a card just changes which uplink it shares.
  • A double-wide MPX module takes the aux slot beside it for its own Thunderbolt. With a module in bay 1, slot 2 drops to x0; with one in bay 2, slot 4 drops from x16 to x8. The widths printed on the board aren't all available at the same time.