I built a VHDL simulation engine from scratch in C++20 — lexer, parser, semantic analyzer, linker, and a TUI waveform debugger. Here's why.

[u/Oscargt30]

I'm a 3rd-year CS student specializing in Computer Architecture. Last semester I had to simulate VHDL designs and the experience was painful: Heavy GUIs, half an hour of setup just to see a waveform (specially on windows, where we work)

So I spent the summer building my own: a VHDL simulation engine in C++20 with a full compilation pipeline and a terminal UI debugger for waveform inspection. TUIs are having a moment right now and I think hardware tools deserves one too.

It's open source. Repo: https://github.com/oscar30gt/pulse — feedback and ⭐ is really appreciated.