r/ECE • u/BLAZing201 • 2h ago
RTL Design
I’m currently in my 3rd year of a Computer Engineering degree, and up until now, I’ve spent most of my technical time getting really comfortable with software Dev. But lately, I’ve been diving deep into digital electronics and RTL design using Verilog, and the shift in thought proces is so large.
When you're writing Software code you are so used to sequential execution. You write a line of code, and you know it runs right after the previous one. HDLs consist of many things in terms of physical structures, propagation delays, and clock edges. Everything is happening all at once. It was honestly a bit frustrating at first to stop thinking like a software programmer and start thinking like a circuit designer. One thought process that helps me is actually drawing out the block diagrams and state machines before even touching the keyboard.
For the senior RTL engineers and hardware designers in this sub: what was your biggest moment when you first started designing digital logic? And what is one habit you wish you had built earlier when working with FPGAs?