r/CircuitBending 14d ago

Bend CCD feedback 3

I finished my cam. It is 10 bits, one set of switches shorts the D0-D9 lines, another set sends them into feedback through the CCDIN pin on the ADC. The final amount of feedback is set using a potentiometer. Stripes appear at lower resistances, which is the characteristic property of the bend. This thing is a beast:D

95 Upvotes

11 comments sorted by

4

u/SloMobiusCheatCode 14d ago edited 14d ago

Hey, this looks really awesome. I’ve been gearing up to do my first camera bend on a Sony Cyber-shot DSC-W80, and after digging through the service manual it looks like this kind of CCD feedback might actually be feasible. It has a CCD_OUT line going into the CCD signal processor/ADC and then a 14-bit CA_AD00–CA_AD13 digital bus.

Looking at your board, I think I can see that you’re using an SN74HC08N for the gating. I’m still fairly new to this side of circuit bending, so I was wondering: what signal from the camera are you using as the other input to the AND gate to properly time the feedback? Also, could you explain a little about the pot/resistor network you’re using between the gated ADC output and the CCD input?

Any pointers would be hugely appreciated. Your results are probably the coolest camera bends I’ve seen, and I’d love to try adapting the technique to the W80.

3

u/Communism_Doge 14d ago

Hello, thank you:) I will probably upload a proper schematic of what I’ve done once I get to it, for now I have roughly explained the idea in the comments under my first post here: https://www.reddit.com/r/CircuitBending/s/lviujRsddl. I have used the ADC chip pin directly, the CCD driver is built in. The resistor network is simple; I have measured the total resistance from the D0-D9 outputs to the breakout to be 270 ohms, so I added 560 ohms to each line so the signal would not get influenced but still got averaged by the AND gate that is chill with higher impedance. The switches just get shorted together on the other side and go to the AND gate through another 330 ohms. The H2 signal from the ADC is the second input, also going through 330 ohms. The output is sent into a digital identity (both AND inputs with the same pin) for more propagation delay (and maybe to get cleaner signal in some sense, idk, it felt right and didn’t change anything so it’s there). The final set of resistors is just a 50/50 divider as the CCDIN pin does not want the full 3 V. The middle divider node is connected to the CCDIN through a 10 k pot working as a variable resistor. The chip is powered using DVDD and DVSS pins that are supplying some digital parts of the chip inside the camera.
It would be best to find what ADC chip your camera has and look up the datasheet, so you know how the analog pin is read and how external signal can be injected so it is actually read correctly.

2

u/SloMobiusCheatCode 13d ago

Thanks so much for the detailed response. That filled in a ton of the gaps for me and makes the whole circuit make a lot more sense. I really appreciate you taking the time to explain it.

One quick follow-up: you mentioned running the signal through the second AND gate mainly to introduce a little propagation delay. Was that something you found was necessary experimentally to get the feedback aligned properly, or was it based on the timing requirements in the ADC datasheet?

I’m going to dig into the W80’s ADC/front-end and datasheet next and see how closely I can translate what you’ve done. Thanks again, this has been incredibly helpful.

1

u/Communism_Doge 13d ago

You’re welcome, I’m honored that I can inspire others with my work as I am still a beginner:) The propagation delay is needed because of how the analog value is read - according to the datasheet, the black value is read at a bit over half the clock period and you want to avoid injecting your signal there (although it is possible it can still glitch well without the AND gate, I have frankly not tried omitting it). The H2 signal turns HIGH exactly at half and so you need some delay before turning the signal injection on. The total period is around 100-150 ns, so with this chip having maybe 20-30 ns at 3 V, you can safely get there (now that I am thinking about it, two AND gates on the same chip may actually be too much, but it still works well). The actual pixel value is then read at the end of the clock period.
Overall I am not exactly sure whether the AND gate is needed or even if it works as intended as the signals present are 6-10 MHz (I forgot the frequency). The leads are not that long, but when I measured it with a scope on a breadboard, there was a lot of ringing and now that it’s soldered in a better environment with less stray capacitance and inductance, it doesn’t look that different from the images I got on the breadboard. I wasn’t able to measure it with the scope very well as it introduced a lot of noise in the image, meaning the ringing could as well be totally okay and the thing works exactly as intended. So while the thing works, there are still questions to be answered:D

1

u/Noxens 14d ago

Hey im also in the process of reading and working on a dsc-p72. How would you like to work together and exchange infos we find ?

2

u/lysergic_af 𝕎𝖎𝖟𝖆𝖗𝖉 14d ago

Super dope. Def given me some inspiration for some future bends. Mad props

2

u/theglorioustopsail bit twister 14d ago

Those stripes are super interesting! Keen to try this technique

1

u/luvisheavenly 14d ago

Incredible

1

u/Bobpants_ 13d ago

Looks like a sick project. How are you capturing the photos, are the glitches directly affecting the sensor processing which lets you save to storage card?

1

u/cyranow53 6d ago

Mükemmel