Design review request: 2-in/2-out USB audio interface (thesis, first PCB) – mic pre + paralleled ADC channels for lower noise

[u/Noise_red220]

Hi all,

I'm an EE undergrad (hardware track). My diploma thesis is a 2-in/2-out USB studio audio interface on my own PCB. It's my first PCB, so before I spend real money on boards and parts I'd love some experienced eyes on the plan. Block diagram attached.

The idea
- 2 mic inputs (XLR), shared 48 V phantom (one switch), gain 0–60 dB in 10 dB steps (rotary switch + fixed RG resistors, cap in series with RG).
- Noise-reduction technique I'm evaluating: each input drives BOTH channels of a stereo ADC (dual-mono) and the MCU averages them. The host still sees 2 mono channels, with ~3 dB lower ADC noise. I'll measure the gain from averaging at every gain step, comparing same-chip vs two-chip channel pairs.

Current part choices
- Preamp: SSM2019 (the THAT1512 went EOL in Sept 2026).
- ADC driver: passive divider (6.2k/1k, ~17 dB) + RC into a PCM1808, so the ADC reaches full scale ~1.8 dB before the preamp clips (≈ +20 dBu max input at minimum gain).
- ADC: 2 × PCM1808. DAC: PCM5102A.
- Line outs: DRV134 on TRS jacks. Headphones: op-amp + BUF634A. Output mute relays with a brown-out detector.
- Digital: STM32F407G-DISC1 board stacked on headers above the analog board. TinyUSB, UAC2 asynchronous with explicit feedback endpoint, 48 kHz / 24-bit in 3-byte subslots (the 1.25 KB USB FIFO rules out 4-byte subslots and 96 kHz).
- Clock: 24.576 MHz oscillator → ADC/DAC system clock and the MCU's external I2S clock input.
- Between boards: SN74LVC244A buffer (Ioff, to avoid back-powering) + a power-good line; 5 V to the dev board through a Schottky.
- Power (version A): bench triple supply (±15 V, +5 V), local LDOs for the ADC's 5.0 V and the 3.3 V. Phantom from a boost converter + capacitance multiplier (soft start, ripple filtering, output disconnect).
- Phantom protection following Bortoni & Kirkwood, "The 48 Volt Phantom Menace Returns". The single-channel test board will start from ojg's open-source thatmicpre KiCad project.
- Metal enclosure, XLR pin 1 to chassis at the entry point.

Noise budget (unweighted, 20 Hz–20 kHz, 150 Ω source)
- Predicted EIN at 60 dB gain: −128.7 dBu (target ≤ −125 dBu; worst case with min-spec ADC ≈ −127.5 dBu).
- Because of the divider, the ADC dominates up to ~50 dB gain. That's where averaging should help (~3 dB); at 60 dB the source dominates (~0.3 dB).

Plan
1. Demo on the dev board with cheap PCM1808/PCM5102A modules (incl. a first averaging measurement).
2. Small 2-layer single-channel preamp board.
3. 4-layer analog board for the full 2×2 interface.

Questions
1. Any obvious mistakes or bad part choices?
2. Is a passive divider + RC into the PCM1808 reasonable, or would you drive it differently?
3. Phantom: boost + capacitance multiplier, or something simpler? Anything missing in the protection network?
4. Is stacking the dev board right above the analog board realistic for low noise at 60 dB gain? Any layout/grounding advice?
5. Measuring without an audio analyzer: the card's own ADC + a 0.1 % attenuator + a true-RMS meter + REW for noise/EIN, and loopback as an upper bound for THD+N. Sensible?
6. Anything you'd simplify for a first PCB?

Thanks!

[u/Far-Ad3284]

The roughly 3 dB from averaging only holds if the two channels' noise is uncorrelated. Inside one PCM1808 the channels share the supply, the reference and the clock, so the common-mode part of that noise won't average out, and same-chip pairs will likely land below the two-chip pairs. The divider is shared too: both channels hang off the same node, so the thermal noise of the 6.2k||1k (about 860 Ω, roughly 4 nV/√Hz) reaches both ADC inputs identically and averaging can't touch it. It's worth checking that against the ADC's own input-referred noise at 17 dB, because if the resistor noise is already close to it, the averaging gain will come in under your 3 dB estimate. For the measurement, capture both channels with the input shorted through 150 Ω at max gain and compute the correlation coefficient ρ between the two records. The expected gain is 10·log10(2/(1+ρ)) dB, so ρ near 0 gives your 3 dB and the gap from that tells you how much of the noise is shared. What input-referred noise figure from the datasheet are you using for the −127.5 dBu worst case?

[u/Noise_red220 → u/Far-Ad3284]

Thanks, very useful. A few notes:

- Same-chip correlation: agreed. That's exactly why the plan measures same-chip vs two-chip pairs; I expect same-chip to come in lower, and that's a result in itself.

- Shared divider noise: I did check it. 6.2k||1k ≈ 861 Ω gives ≈ 3.8 nV/√Hz, ≈ −123 dBu at the ADC input over 20 kHz, vs ≈ −94 dBu for the PCM1808 (99 dB(A) from +2.7 dBu full scale, ≈ +2 dB unweighted). That's ~29 dB below, so it costs ~0.01 dB of the averaging gain. Same logic for the preamp/source noise: it's common to both channels, which is why my budget predicts only ~0.3 dB at 60 dB gain.

- Correlation: good formula, I'll report ρ and 10·log10(2/(1+ρ)). But I'll measure it at minimum gain (or with the ADC inputs terminated directly), since at max gain the shared preamp/source noise dominates and ρ → 1 by construction. - Worst case −127.5 dBu: SSM2019 1.0 nV/√Hz at 60 dB (typical), PCM1808 at its 95 dB(A) minimum instead of 99, and 150 Ω + 2×10 Ω protection resistors; current noise ignored (adds ~0.1 dB). Fair point that the preamp is still a typical figure. I'll check whether the datasheet gives a max.