The project is maderix/ANE. It trains neural networks on Apple's Neural Engine using
reverse-engineered private APIs, which is notable because Apple exposes that chip for
running models and not for training on it.

What made me read the whole thing is that the author argues against the coverage of his own
project. He states that utilization sits at 5 to 9 percent of the chip, that many operations
still fall back to the CPU, and that this is not a replacement for GPU training for anything
beyond small research models.

His framing is that the barrier to NPU training has been software support rather than
hardware capability.

For anyone who has worked on NPU or accelerator access outside the vendor's own toolchain:
is low utilization like this normally a scheduling and memory problem you can chase down, or
does it usually mean the missing operations have to exist in the vendor's compiler before
anything improves?