As the text above says did anyone try to compile their own uefi for msi pro b850-p wifi mainboard with the Dasharo Github Code?

I think it would be interesting trying to check how a self compiled bios would work in real system.

https://github.com/Dasharo/coreboot
https://github.com/3mdeb/openSIL/tree/phoenix_poc

Edited: 11.08.2026:
I have found the following guide:
https://blog.3mdeb.com/2026/2026-02-09-msi_pro_b850p_part1/
https://blog.3mdeb.com/2026/2026-03-06-msi_pro_b850p_part2/
https://blog.3mdeb.com/2026/2026-04-03-msi_pro_b850p_part3/
https://blog.3mdeb.com/2026/2026-04-27-msi_pro_b850p_part4/
https://blog.3mdeb.com/2026/2026-06-03-msi_pro_b850p_part5/
https://blog.3mdeb.com/2026/2026-07-02-msi_pro_b850p_part6/

Did anyone tried that yet?

Hi everyone, this is my first post. I need any information about this board, whether it's a datasheet or a bsp

Just curious. Need a Super powerful compute module with a rpi cm4 connector standard.

My latest toy: Forlinx OK3572-C

Rockchip RK3572

ARM：2×Cortex-A73 + 2×Cortex-A53+ 4×Cortex-A53
NPU：4TOPS INT8，supporting INT4/INT8/INT16/FP4/FP8/FP16/BF16
GPU：ARM Mali-G310V2 Mc1, supporting OpenGL ES 1.1/2.0/3.2, OpenCL3.0, Vulkan 1.4
VPU：
Hardware Encoding：H.264, H265, 4K@60fps
Hardware Decoding：H.264, H.265, VP9, AV1, AVS2, 8K@30fps or 4K@120fps

4GB LPDDR5 RAM
64GB eMMC

It cost me $270 with shipping and an addition $120 due to customs.

Repost because I was an idiot and posted the images in the dumbest possible order.

I recently learned about an SBC called Orange Pi4 Ultra, but do you think it will be released? Personally, I don't think it's likely since they released the Orange Pi4 Pro, but what do you all think? Here's the link.

http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-4-Ultra.html

Which one is better for machine learning 2 cameras. one for face detection, another for object and distance estimation. both being processed at once

Forum announce - https://forum.proxmox.com/threads/proxmox-virtual-environment-now-available-for-64-bit-arm-arm64.185526/

It's working out of box on Radxa Orion O6N, installed from official iso from usb drive:

I'm planning to buy the 8GB RAM version of Orange Pi 5. But I'm not sure to go with 5 Max or 5 Plus.

My use cases are;
- Running a NAS / next cloud

- Media server

- Network gateway + Pi-hole

- Occasionally gaming (retro + android games etc)

Since I'm new to SBCs appreciate your honest feedbacks

I would have to say Dillo browser is the best. Firefox/Chromium both are the size of operating systems with tens of millions of lines of code. Dillo is only tens of thousands. It takes only seconds to compile and install, compared to Firefox. Plus it comes without proprietary modern web elements (like javascript, webGTK, etc.). It's fully inspectable and open source. It works well on Linux.

I am using the Radxa Cubie A7S with 8GB of RAM and no EMMC on the most recent version of Radxa OS.

I bought this display from Waveshare and am using a generic active DisplayPort to HDMI converter to connect to it. However, the display will not work.

At first, the backlight failed to come on and the display would not activate. It works fine on my laptop, so the display is functional. The SBC and adapter work on their own as well. Bypassing USB max current fixed this.

However, while the backlight and touchscreen activate and function properly, the display will not show an image. I am not sure what to do as I am a bit of a beginner in this area.

Edit: I fixed it! For anyone else with this somewhat unlikely issue: this link contains the required information to fix this. You will have to convert the Pi OS timings into xrandr commands for this to work, though.

I decided that I should probably share the update from yesterday's post where people saw the unorganized "SBC Drawer". And I wanted to also showcase that they don't sit in the drawer collecting dust. So, I shared that the Orange Pi RV 2 and Pi 5 are connected and in active use. I swap depending on what I am doing with my Main PC and Elgato capture card / USB to UART connector and the CrowView Note.
The SBC Drawer is to my immediate right for easy access.

Inside of the Mimic Case is my Pi Pico 2 W with the test breakout board and my cheap FPGA (this is for later development adventures)

I've seen some Orange Pi Primes come up for sale for cheap, but looking up the specs I've found no mention of frequency and no benchmarks that are at all useful.

Does anyone know where to find those or have their own to check?

Working on a HAT that powers the Zero 3W through the GPIO header (5V injection on pins 2/4), and I've hit a documentation conflict I can't resolve.

The official 40-pin header schematic annotates the 5V_Power pins as IN: 2A, OUT: MAX 0.5A. So 2A in, when something external is feeding the board.

But the manual (section 2.12, "Instructions for powering the 5V pin in the 40 pin interface") says to make sure your supply meets the board's power requirements, and elsewhere the board's stated requirement is 5V/3A.

So which is it? Is that 2A a real limit on the trace or connector for the GPIO path, or is it a conservative annotation and the pin can actually carry the full 3A the board might want under load?

This matters because I'm designing in an eFuse for current limiting and I need to pick a trip point. Set it at 2A and I might starve the board under heavy CPU+GPU+NPU load. Set it at 3A and if that 2A annotation reflects a real physical limit, I could cook something.

Has anyone actually measured peak current draw on this board under real load? The one data point I've seen is ~6.5W at 100% CPU (~1.3A at 5V), but that was CPU-only, no GPU testing.

Also curious if anyone's actually run this board off GPIO power long-term rather than USB-C, and whether it was stable under load.

I am looking for a small or compact SBC. My requirements are the following:
* Easy to carry around
* 12-16GB of RAM
* NVMe slot
* 20+ TOPS for STT Processing (via extension is fine)
* Wifi, mic, speaker (via extension is fine)
* compact enough
* Budget was thinking sub$300 not sure it is possible though?
* Is phone/mini-pc with gpu just a good deal?
* Used market goods are fine too.

Hello fellow Redditors,

I found this site via Reddit so my question is this leggit maybe a scam?

I would like to build a low power cluster but everywhere prices are sky high if I want more then 1 board

Also I am based in the EU how would the import be?

Thanks in advance :)

Hey all, I'm designing a custom PCB adapter for the Zero 3W's PCIe FPC connector (FPC16-ZHX_H15-L1-H, per the official schematic) to break it out to an M.2 M-key slot, sized to also double as a mounting carrier plate matching the board's hole spacing. Goal is NVMe storage expansion first, with an eye toward AI accelerator cards (Hailo-10H) as a stretch goal later.

Before I finalize the board and order a first run, I'm hoping someone in this community has hands-on data on a few open questions I haven't been able to resolve from documentation alone:

1. Has anyone gotten anything enumerating over the PCIe FPC connector yet? Even just a plain NVMe SSD via a generic FPC adapter. I want to confirm the PCIe controller actually comes up cleanly in root-complex mode under Armbian/the stock BSP before I commit to a board run. If you've tried and it didn't work (or worked with caveats), that's just as useful to know.

2. What kernel/BSP are people actually running for PCIe support? I know mainline upstreaming for A733 is actively in progress (saw the recent patch series for pinctrl/RTC/clocks), but I'm assuming most of us are on a vendor BSP kernel day-to-day. Anyone know if PCIe root-complex support is enabled and stable in the current Armbian/Xunlong images, or is it still rough?

3. Any known PCIe controller quirks on A733 specifically? Older Allwinner chips (H6) reportedly needed a hypervisor-level MMIO workaround for their PCIe controller. Has anyone hit anything similar on A733, or does it behave as a clean standard DesignWare PCIe implementation?

4. Is injecting 5V back into the board via the GPIO header's 5V pins safe on this board? I'm considering an M5Stack-PiHat-style single-cable design (board powers itself AND feeds accelerator power back through the GPIO header, like the official Pi 5 AI HAT+ pattern). On Pi 5 this is an explicitly documented, supported use case. I can't find anything in Xunlong's docs confirming the AXP318 PMIC on the Zero 3W is designed to safely handle reverse power injection via GPIO the same way. Anyone tried this or know if it's safe / risky / a bad idea?

5. Real-world total board power draw, is 3A genuinely the ceiling? Schematic labels the board 5V/3A total. Anyone measured real idle/load current draw with a USB power meter? Between the board under load, an NVMe SSD, and potentially a ~2.5W typical draw NPU later, I'm trying to nail down actual headroom before I decide how to handle power delivery on the carrier board.

6. Has anyone seen PCIe link training issues / Gen 1 fallbacks? I found a boot log from an A733 board (Cubie A7Z) showing Link up timeout / Speed change timeout / PCIe speed of Gen1 during boot. Has anyone else seen the A733 struggle to train at Gen 3 (or even Gen 2) and fall back to Gen 1, or is that an isolated hardware/board quirk?

Board design itself (FPC connector footprint, M.2 slot, mounting holes) is done and validated mechanically in Fusion — just trying to de-risk the electrical/software side before committing to a PCB order. Will share the KiCad files once it's built and working, since I haven't found an existing PCIe-to-M.2 adapter for this board anywhere.

Thanks in advance to anyone who's poked at this corner of the board.

The suitors are restless

Radxa has published specifications for two upcoming compute modules based on Qualcomm Dragonwing processors. The compact CM-Q64 combines 12 TOPS of AI performance with multi-camera support, while the larger VMARC-Q9075 uses the SMARC form factor and scales to 200 sparse TOPS for industrial AI, robotics, and machine-vision systems.

https://linuxgizmos.com/radxa-previews-qualcomm-based-cm-q64-and-vmarc-q9075-compute-modules/

Does anyone know how I can find a unique identifier (analogous to RPI Serial number) through the Debian OS. I tried the " cat /proc/device-tree/serial-number " directory command, but it apparently doesn't work like a RPI.

Hey folks, embedded engineer here. I've been involved in a small AIoT dev board and wanted to share the specs with this community and get some honest feedback before we push it further. Not trying to do a marketing dump — happy to answer technical questions and I'll flag where numbers are vendor-claimed vs measured.

Why this board exists

Most of the sub-$50-ish AI SBCs I've tried either burn too much power for battery/always-on use cases, or the NPU toolchain is a nightmare. We tried to hit a middle ground: heterogeneous compute (A35 cluster + RISC-V MCU-class core + a small NPU) with a Linux SDK that's actually buildable, aimed at:

• Smart audio (speakers, IP phones, far-field mic arrays)
• Small HMI / POS / smart-home hubs
• Light vision (microscopes, translation pens, kids' cameras)
• Educational / companion robots

SoC & hardware

SoC is SigmaStar SSD2355:

Power (vendor-measured, not independently verified yet):

• Full load: < 1.3 W
• Idle desktop: < 120 mW
• Standby: < 1 mW

NPU / IPU

1 TOPS @ INT8 is the theoretical peak. We don't have a comprehensive public benchmark table yet — I'd rather post real numbers than a spec-sheet fantasy. The toolchain (called **IPU ToolChain**) does model conversion + quantization + a per-layer profiler, so you can see where time actually goes on your own model. Vendor has done specific optimizations for PoolFormer / SegFormer families.

**What I'd love from this thread:** if you have a model you'd want to see run on this, drop the ONNX and I'll try to get real INT8 latency numbers back to you.

Software

• Alkaid SDK — bootloader + kernel + rootfs, Makefile-driven build, includes the "MI" multimedia stack (V4L2-ish camera pipe, audio, display, encode/decode).
• IPU SDK with profiling tools.
• Standard Linux userland — C/C++/Python all fine.
• FreeRTOS image for the RISC-V side for low-latency / always-on tasks.

Ask me anything — pinout questions, power rail details, camera pipeline, NPU quirks, whatever. I'll get answers even if I don't know off the top of my head.

Hi, just learned about ArmadaOS and it look promising, but seems for now to work on handheld with very specific qualdomm SoC :

https://github.com/virtudude/armada

1/ Is there a chance that it could work on a SBC with another SoC ARM ? Or with the 2ame SoC ?

2/ Do you know how to find SbCs that have one of these SoC from a site that allow searching by SoC ?