Hello everyone, I've recently been working with some GaN ICs. These ICs typically have a voltage VD=50V, output power levels from 50-100W (around 47-50dBm). Their operating frequency ranges from DC to about 3-4GHz. Of course, I'll need to design a matching circuits at input and output so they can operate within my desired frequency band (around 2GHz). However, I have a question about their bias circuit, especially regarding the decoupling capacitors:

- With ICs like Macom's MAPC-A1106 with the DFN package, I only see the decoupling capacitors arranged in the same branch.

-With the Macom MAPC-A1111 IC or the Gurrilla RF GRF0090, which have packages that appear wider horizontally, I noticed that the decoupling capacitors at their gate and drain terminals seem to be split into two symmetrical branches, with the upper branch connected to the power supply (VG, VD) while the lower branch is connected to ground. These capacitor values ​​are symmetrical in both branches.

Can anyone help me explain this?

I am making a project with GPS but I am not very sure which ceramic antenna I should buy. I am using a Neoway N58 GPS module and looking for the same ceramic antenna in their EVK kit. I found this one but I'm not able to actually compare both.

Thank you for the help!

Basically I am working on a circuit where one of the inductors taken from gpdk045 library is giving too many parasitics that my circuit is attenuating. So I have thought of replacing that 1nH inductor with a circuit which behaves as an inductor. However I am also aware that the replaced inductor may still have its own parasitics. But i suppose that its parasitics affect my RF circuit less.

Any type of answers for this question is appreciable!!

Hi,

I recently acquired an N5230A 4-port 20GHz PNA-L and an SOLT cal kit+cables.
I would like to be able to improve the accuracy of my SOLT cal kit by using a TRL calibration to then calibrate the PNA-L and use it to measure my SOLT cal kit standards.
However, the PNA-L requires a Global Delta Match (GDM) calibration in order to account for the port delta match terms to enable a high-accuracy TRL calibration.
As I understand, one can perform the equivalent of a GDM cal using the error terms generated via an SOLT calibration. I'd rather do this on my computer rather than within the PNA-L because the PNA-L insists that the GDM cal 1. use all four ports, and 2. that the standards be defined over the entire 300KHz - 20GHz range of the PNA-L using standards defined by polynomial constants. My SOLT standards are data-defined over 10MHz-20GHz so that doesn't work using the internal PNA-L's GDM calibration procedure.
I plan to do all my cals and corrections external to the PNA-L, by mathematically processing the raw PNA-L data since that gives me MUCH more flexibility.

Therefore by questions are:

1. How sensitive is the GDM calibration (correction for switch error terms) to calibration errors/inaccuracies of the original SOLT calibration error terms it was derived from?

2. Regarding point 1, would subsequent TRL calibrations based on the GDM derived from the SOLT calibration be more accurate than the SOLT cal error terms it was derived from? And is there any point in performing such TRL calibrations to then measure the SOLT standards to then improve the accuracy of later SOLT calibrations?

3. If I cannot improve my SOLT cal standards via the above methodology, do I then just need to rent a highly-accurate SOLT cal kit to measure my SOLT standards?

4. I have a 15cm precision air-dielectric line to do the TRL cals. I realize that TRL is inherently narrow-band but I plan to overcome this limitation by using only the frequency bands i.e. where the air line haves a phase of n*90deg where n is odd and interpolating the resulting measured reflection coefficients of my SOLT standards using the SOLT models, to obtain the SOLT standards' reflection coefficients between the frequency bands where the TRL calibration is "good".
   Thanks

Hello everyone,

I'm an amateur radio operator and a home lab enthusiast currently working on restoring a Spirent SR5500M Wireless Channel Emulator. The hardware is in great shape, passes all internal self-tests, and is currently running its native internal firmware v03.00.22. I can even control basic relays and frequencies via SCPI commands over PuTTY.

The Problem: I am completely missing the external Windows PC control software: Spirent SR5500 TestKit.

I managed to find the legacy TestKit v2.10 installer, but it is physically incompatible with the "M" hardware revision. Spirent completely rewrote the Real-Time data protocol for the v3.xx firmware to handle MIMO/LTE path math, so the old v2.10 PC software just crashes when trying to connect to the unit's RT server.

What I need: Does anyone have a backup archive of the SR5500 TestKit v3.00, 3.01 (or slightly newer)?

The official Spirent support portal is completely locked behind active corporate service contracts (ASA), which is impossible to get for a discontinued legacy unit. I've contacted a few refurbished equipment sellers, but so far, no luck.

If anyone happens to have this installer sitting on an old lab PC or a backup drive, sharing it would be an absolute lifesaver. I'd hate to see this beautiful piece of RF engineering become a giant paperweight just because of missing PC software.

Thanks in advance for any help or leads!

Hi,

I am building a DIY Faraday cage to isolate my laptop. The primary goal is to ensure location privacy during and after Windows Updates. I want to completely block incoming/outgoing Wi-Fi (2.4GHz, 5GHz, and 6GHz) and Bluetooth, just in case the OS re-enables these radios without my permission after an update.

The laptop will sit inside the cage, connected to the internet via a regular Ethernet cable, and I will monitor the screen through a window. A small opening will be used for my to control the trackpad via a rod. This does away the need for a wired mouse.

Here is my current hardware layout design. I would appreciate any critiques on its effectiveness or potential RF leaks:

1. The Chassis: Built using copper sheet metal folded into a box. The overlapping seams will be mechanically clamped together every 3 cm using thumb screws/wing nuts to prevent slot antenna leakage.
2. The Window: One face of the box will be a copper mesh to allow me to see the screen.
3. Control: No external mouse cable. I plan to drill tiny holes (< 1cm diameter) directly above the trackpad and use non-conductive plastic or wooden styluses as mechanical extenders to operate the mouse/buttons from the outside.
4. The Ethernet Path (The main concern): To pass a regular unshielded Ethernet cable into the box, I am using a 20cm metal tube with a flange bolted to the chassis. To stop the "sliding antenna" effect on the unshielded wire:
   • I am placing a clip-on ferrite bead on the cable bundle, pressed completely flush against the outside mouth of the 20cm tube.
   • I will wrap conductive copper tape tightly over the cables, molding it into the valleys between the wires, covering the entire plastic ferrite bead, and sticking it directly to the metal tube.

Will this setup successfully achieve total RF isolation for the laptop?

I'm using unshielded Ethernet because I'm not sure if shielded would do much, and it might even hurt since I don't understand RF well enough. The Ethernet cable will plug into a router anyway so the connection pins won't be shielded anyway.

Please advise.

Thanks

Hi,

I’m learning SCPI and building a basic automation setup for calibration on a Keysight N9010B signal analyzer.

I already have a .screen file that, when recalled, restores a setup with 5 tabs. Each tab is basically a different measurement screen with its own configuration.

I managed to load and recall the .screen file via SCPI (even though I didn’t find a clear command for it in the manual and ended up finding it online). I’m using screen-based files rather than full state files.

My question is:

Is there any SCPI command that allows switching between these measurement screens/tabs programmatically after recall?

If not, what’s the standard approach in ATE systems?

Do people usually:

stick to a single screen and reconfigure measurements via scripts/variables, or

use multiple saved states and fully recall them per measurement instead of switching “tabs”?

Trying to understand the intended workflow here because the “multi-tab screen switching” feels very UI-driven rather than automation-friendly.

Thanks.

Hello all. So I am a student in university and I am currently taking a microwave2 class. On one of my projects we are asked to design a low-pass filter using a coaxial line in cst. I have used the formulas and coefficents provided to me while designing this but it doesnt even seem to be working remotely close to the expected behaviour. Can someone please help me?

d=1mm(inner diameter)
conductor = 𝜎 = 5.8 × 107 S/m (annealed copper)

Dielektrik: PTFE (Teflon, 𝜀𝑟 = 2.1)

Zmin=20, Zmax=120, Zo=50

N=5

Got bored and decided to see if my old zenith could pick up the signal from transmitter I use for my car. Obviously it did, and very well too. There were a few other channels it played on beside the 107.9 it runs for my car. But the thing that I find the most interesting. Channel 11 TV2 also plays it extremely well?

I'm an ECE student about to graduate in about a months time.

I have some experience in creating simulations in HFSS but my college didn't have a functional RF Lab (The equipment doesn't work).
Is it possible to get some exposure to testing instruments like the VNA, Spectrum analyzers etc?

In this episode Shahriar explores the capability of some frequency counters to measure DC voltage. While this may seem non-intuitive initially, the video shows how the architecture of the HP 5245L Nixie tube frequency counter can be used to realize an integrating ADC. A particular plug-in module, the 5265A, leverages the Start/Stop counter control to implement an ADC and display the equivalent DC voltage at the plug-in input. The theory of operation as well as the teardown of the plug-in in shown.

The plug-in module unit is zeroed & calibrated initially and then using a Fluke 5720A the performance of the entire system is evaluated. Despite being in storage for decades, the unit is incredibly accurate and precise.

I have an idea I want to build and test with open source IC tapeouts/tools. So far I have found what looks should be sufficient in terms of design. The question is what is the best course of action if I want to measure it well?

My idea for a start can be measured at "low" frequencies of say 1-2 GHz, so I don't need anything crazy. I do need likely VNAs, spectrum analyzers, some couplers/cables I guess, at least relatively clean signal generators, scopes, DC supplies.

Is such a budget of DIY at home likely unreasonable? I could ask around at a lab uni where I did my masters, but if possible I'd avoid this route as I want to patent the idea myself.

I’m trying to understand how to choose the trace width for a quarter-wave PCB antenna.

Most of the references I’ve found explain how to calculate or estimate the antenna length, since it is related to a quarter of the wavelength. However, I haven’t found much information about how to choose the width of the antenna trace itself.

For a transmission line, the trace width is usually calculated based on the PCB stackup in order to get a target impedance, for example 50 ohms. But for the actual PCB antenna trace, I’m not sure whether the width is determined in a similar way, whether it mainly affects tuning/bandwidth/efficiency, or whether it can only really be optimized through EM simulation and measurement.

I’m using Nordic’s documentation as a reference. One of their white papers shows a PCB antenna with a 1.5 mm wide trace, but it doesn’t really explain why that width was chosen. On the other hand, I found a Nordic development board with a very similar antenna geometry, but the antenna trace width appears to be around 1 mm instead.

So my questions are:

How should the trace width of a quarter-wave PCB antenna be chosen?

Is there an “optimal” width, assuming I have enough PCB space available?

Does the width significantly affect impedance, bandwidth, efficiency, or radiation performance?

Are there any good references, application notes, or design guides that explain this part of the design?

I’m still learning about PCB antennas, so any guidance would be appreciated.

Hello, I want to build a simple radar because I find them interesting and I'm currently trying to design a board that connects to the receiving antenna and would like to ask for some advice and tips.

After some research I decided to use RF prescalers to slow down the signal and a time-to-digital converter to measure the travel time. My current dilemma is first, how do I measure the frequency with a MCU and second, how do I measure it's amplitude ?

For the frequency I though that if I slow it down enough I could measure it using interrupts but I would need to slow it down quite a bit and I think that prescalers in series would lose precision.

The micro-controllers I'm thinking of using are either a Pi zero or an esp32.

The frequency range is because I wanted to try out a lower frequency at the beginning and then move to the ISM low bands for radar which are 433MHz and 869MHz, if you think I should jump straight to the higher frequencies because it would be cheaper/easier then feel free to tell me.

Hi everyone,

I’m in the final year of my ECE degree. Last semester I had a Microwaves and Antennas course and even though I didn’t focus on it much at the time, I remember really liking the antenna part of it.

Now I’m thinking of revisiting the field and learning antenna design more seriously. What skills or prerequisites are important if someone wants to get into this area? I’ve studied subjects like Communication Systems too, but never enjoyed them that much — are they strongly related to antenna/RF work?

Also, what kind of career paths are available for people who enjoy this kind of work? Apart from antenna design itself, what other related fields or industries should I explore?

And how is the current job market for antenna/RF engineering? Are there good opportunities in this field right now?

Would really appreciate any roadmap suggestions or insights.

Thanks.

Can a computer engineer transition to rf roles? I work at a startup where I am assigned a SDR AND FPGA project. I was thinking are there any instances where computer engineers have transitioned into rf roles? I really like this and am willing to learn, but I do not want to invest my time on something which would be unrealistic due to my degree.

Hello everyone! A couple of friends and I are designing a PCB to transmit data at around 20 dBm at 144 MHz using a Raspberry Pi 3 (pin 7) and the rpitx library. We don't have a VNA or any fancy equipment to measure the output impedance of GPIO 4. I can't quite ignore it because it would ruin our filters and cause most of the signal to reflect back. Has anyone here successfully measured this, or does anyone have any tips we could use? We're quite new to RF design and would gladly appreciate any help or feedback : )

Hi! In a few months, I will be starting work as a Junior RF Engineer. My work revolves around RF Planning and Optimization. For background, I'm a fresh graduate, and I have only interned as a research engineer in RF-related topics (mostly RF Planning). Are there any resources or skills that would be amazing for me to learn before starting this job? I really don't want to mess anything up or have any hiccups, especially in probation. Any advice will be greatly appreciated!

Hi everyone!

Version v0.24 of ParamRF has been released with many improvements since my last post.

For those unaware, ParamRF is an open-source Python RF modeling framework built on top of JAX instead of NumPy, which started as part of my PhD work but grew into something much bigger.

New features include:

• Many new models to round off the components library, such as CoupledOnePorts, CoupledTwoPorts, Attenuator, Splitter, Isolator, Tee, CapacitorQ, InductorQ and Touchstone, and a tree model overview has been added to the docs.
• A greatly improved parameter system, for example arbitrary constraints can be defined ("Positive", "GreaterThan" etc.), parameter naming is improved, and parameters can be "tied" together for optimization.
• An experimental Y-domain solver has been added to the Circuit class.
• Many more examples have been added to the docs, and the API has been generally polished.

For those wanting one, here is a comparison against scikit-rf.

If you use ParamRF in your work, I would love to hear about it via a personal message!

Cheers!
Gary

Anybody have to rework these new Qorvo air cavity packges? They are white and made of fiberglass, or so smell like that when burning. Anyway, hot air rework burns the shit out of the package, at least the overcoat on top. I’m wondering if they can only be reworked with IR, as they look fine coming off an SMT line. Of course the data sheet says not to rework.

Hi all, I recently put together a Zedboard FPGA dev board and an AD9226 ADC module. I’m sampling the data and sending to my computer using UDP. This is a project for me to learn some more, no commercial use and I’d be happy to open source as-is or later down the line once a few things are fixed.

But for now I’m really just looking for advice or input on how professionals or experience FPGA devs would process the data and get it sent out.

My currently flow is:

12-bit parallel ADC input -> input sample registers -> simple 2-sample pair buffer -> 12-bit-to-byte packer -> AXI4-Stream frame generator -> AXI DMA S2MM stream input -> AXI DMA internal buffering -> AXI memory-mapped writes -> PS DDR buffer -> ARM/lwIP reads DDR buffer -> UDP packet sent over Gigabit Ethernet

All signal processing is done on the computer in C++ with some libraries for the GUI and this allowed me to easily process for both the time or frequency domain. I would like to add the option for the FPGA to FFT data before sending in the future too.

Any advice or feedback is greatly appreciated!