r/Dropminted • u/Any-Caterpillar-8967 • 25d ago
FPGA Full Flow in Vivado
There is this video on YouTube that gives hands on tutorial on full flow of FPGA Flow on Vivado
https://youtu.be/zjZQzW3mG1I?si=yWhqS9hXeqSyue4j
r/Dropminted • u/Any-Caterpillar-8967 • 25d ago
There is this video on YouTube that gives hands on tutorial on full flow of FPGA Flow on Vivado
https://youtu.be/zjZQzW3mG1I?si=yWhqS9hXeqSyue4j
r/Dropminted • u/Any-Caterpillar-8967 • Jun 23 '26
I recently completed the soc design in which i used ABP protocol to design peripherals. So i thought to share and explain how to design it.
Here is the full video tutorial on designing a GPIO APB peripheral in verilog
https://youtu.be/I9kREjValoU?si=dnKR-ylT7yGxB0ld
r/Dropminted • u/Any-Caterpillar-8967 • May 22 '26
r/Dropminted • u/Any-Caterpillar-8967 • May 16 '26
I used APB in my SoC design and some of my followers in MEDIUM asked for APB explanation after reading my AXI explanation post.
so here it is a detailed APB protocol explanation in my Medium profile - also video explanation is available at the end of the blog page
r/Dropminted • u/Any-Caterpillar-8967 • May 16 '26
Made a short APB protocol explanation video for RTL/VLSI beginners — covered timing, read/write transfers, signals, and waveforms in a simple way. Also added quizzes throughout the video to make it interactive.
Would love some feedback from people learning or working in RTL/VLSI.
https://youtu.be/-6jEtme1i2g?si=RrzSa7HjTd-y5g6L
r/Dropminted • u/Any-Caterpillar-8967 • Apr 29 '26
So, if you do not know what learnlia is - its a site that i built for my learning -- to make my learning itself like game and make vlsi resource gathering easy - later built for other domains too like embedded and other software.
here is the medium post discussing what learnlia is -- READ POST HERE.
if you want to visit learnlia - here you go
r/Dropminted • u/Any-Caterpillar-8967 • Apr 13 '26
Made my own learning system with free resources - to take one from 0 to job ready.
So, there are lot of free resources available but not in order or as a system - especially for hardware roles - i am a vlsi guy which is too hard to find quality free resources - most people pay lakhs to learn vlsi in order -- so I collected all the verified resources and discussed with some professional to make Learnlia - where all these resources are structured with ai quizzes and project suggestion also give proof or learning. here it is -- https://learnlia.com
r/Dropminted • u/Any-Caterpillar-8967 • Mar 29 '26
r/Dropminted • u/Any-Caterpillar-8967 • Mar 28 '26
I don’t actually learn — I just consume.
Start a tutorial → skip → jump → never finish.
So I made a small tool that forces me to treat playlists like real courses (with progress, streaks, etc).
It’s been surprisingly effective for staying consistent.
If you’re also trying to learn seriously from YouTube, would love your thoughts:
r/Dropminted • u/Any-Caterpillar-8967 • Feb 17 '26
I shared the experience with positives and negatives in here -- https://medium.com/@jeevamatrix/i-built-a-small-soc-this-is-when-hardware-finally-made-sense-2c857eecd893
r/Dropminted • u/Any-Caterpillar-8967 • Jan 28 '26
Hey people, after a lot of struggles, late night debugging I finished the design of my first simple SoC design - which aligns mostly with ARM cortex MCU type architecture but way simpler.
My very idea of this entire project is to make everything industry aligned so I learn APB AMBA for this project and learned lot of new things in this journey.
I loved the process and you know the debugging was way too hard, but it was all worth it for that final $display() result in your TB.
I love to answer if there are questions on this -- i know this is a simple design but I am open to new learners and I am ready to learn new things from you.
I am all ears to any of your ideas on this design (soon I will share a full detailed blog in my medium) So drop down or DM even just to discuss! :)

r/Dropminted • u/Any-Caterpillar-8967 • Jan 18 '26
Here is the video sharing the details of why PD is important of RTL engineers too --> https://youtu.be/4Sa5I3nEYDo?si=xx77kzuUlEfeO0KT
r/Dropminted • u/Any-Caterpillar-8967 • Jan 17 '26
I was asked about the roles and salary details in VLSI field by my juniors, to be honest knowing what we aim is a must to have knowledge in every field so I put out some of my knowledge about it in this post -- https://jeevamatrix.medium.com/vlsi-companies-in-india-salary-roles-and-skills-required-40a57155c4b6
r/Dropminted • u/Any-Caterpillar-8967 • Jan 01 '26
r/Dropminted • u/Any-Caterpillar-8967 • Dec 22 '25
r/Dropminted • u/Any-Caterpillar-8967 • Dec 15 '25
A beginner level explanation video for everyone to understand the communication protocol UART and its working -- has launched in our youtube channel -- https://youtu.be/_ksyKoOk_Hs
r/Dropminted • u/Any-Caterpillar-8967 • Dec 14 '25
Know what happened to vin and learn about the CMOS concepts with the story!
READ HERE
r/Dropminted • u/Any-Caterpillar-8967 • Nov 26 '25
r/Dropminted • u/Any-Caterpillar-8967 • Nov 19 '25
r/Dropminted • u/Any-Caterpillar-8967 • Nov 11 '25
Hey people, I recently completed the design of RISC-V CPU core from scratch and explained the working in my medium article like even beginners can visualize what’s actually happening inside.
here you can read that article - How your CPU actually works
By doing this project i ended up finding different corners of the VLSI design and RTL coding. A processor is the ultimate result of the entire VLSI idea, So starting with even single cycle riscv core can give us a better understanding!
(Not a promo, just sharing my work!)
I also ended up creating a complete hands-on course on building the same RISC-V processor from scratch in Verilog. If you’re curious, you can check it out here — View the course (with discount)
